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Experiences in using cetus for source-to-source transformations | |
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The LLVM compiler framework and infrastructure tutorial | |
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An overview of the open research compiler | |
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Trimaran : an infrastructure for research in instruction-level parallelism | |
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Phase-based miss rate prediction across program inputs | |
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Speculative subword register allocation in embedded processors | |
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Empirical performance-model driven data layout optimization | |
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Implementation of parallel numerical algorithms using hierarchically tiled arrays | |
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A geometric approach for partitioning N-dimensional non-rectangular iteration spaces | |
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JuliusC : a practical approach for the analysis of divide-and-conquer algorithms | |
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Exploiting parallelism in memory operations for code optimization | |
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An ILP-based approach to locality optimization | |
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A code isolator : isolating code fragments from large programs | |
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The use of traces for inlining in Java programs | |
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A practical MHP information analysis for concurrent Java programs | |
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Efficient computation of communicator variables for programs with unstructured parallelism | |
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Compiling high-level languages for vector architectures | |
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HiLO : high level optimization of FFTs | |
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Applying loop optimizations to object-oriented abstractions through general classification of array semantics | |
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MSA : multiphase specifically shared arrays | |
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Supporting SQL-3 aggregations on grid-based data repositories | |
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Supporting XML based high-level abstractions on HDF5 datasets : a case study in automatic data virtualization | |
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Performance of OSCAR multigrain parallelizing compiler on SMP servers | |
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Experiences with co-array fortran on hardware shared memory platforms | |
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Experiments with auto-parallelizing SPEC2000FP benchmarks | |
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An offline approach for whole-program paths analysis using suiffix arrays | |
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Automatic parallelization using the value evolution graph | |
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A new dependence test based on shape analysis for pointer-based codes | |
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Partial value number redundancy elimination | |
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Overflow controlled SIMD arithmetic | |
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Branch strategies to optimize decision trees for wide-issue architectures | |
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Extending the applicability of scalar replacement to multiple induction variables | |
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Power-aware scheduling for parallel security processors with analytical models | |
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