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Higher-Level Hardware Synthesis

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ISBN-10: 3540213066

ISBN-13: 9783540213062

Edition: 2004

Authors: Richard Sharp

List price: $54.99
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Description:

The exponential increase in transistor density on computer chips, supporting Moores law now for four decades, poses new design challenges to engineers and computer scientists alike. New techniques for managing complexity must be developed if circuits are to take full advantage of the vast numbers of transistors available. This book investigates both the design of high-level languages for hardware description and techniques involved in translating these high-level languages to silicon. The author introduces the first-order functional language SAFL, designed specifically for behavioral hardware description, and describes the implementation of its associated silicon compiler. Finally, the…    
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Book details

List price: $54.99
Copyright year: 2004
Publisher: Springer Berlin / Heidelberg
Publication date: 3/18/2004
Binding: Paperback
Pages: 196
Size: 6.10" wide x 9.25" long x 0.75" tall
Weight: 1.518
Language: English

Introduction
Related work
The SAFL language
Soft scheduling
High-level synthesis of SAFL
Analysis and optimisation of intermediate code
Dealing with I/O
Combining behaviour and structure
Transformation of SAFL specifications
Case study
Conclusions and further work
DES encryption/decryption circuit
Transformations to pipeline DES
A simple stack machine and instruction memory
References
Index