| |
| |
List of trademarks | |
| |
| |
Preface | |
| |
| |
Acknowledgements | |
| |
| |
| |
Introduction | |
| |
| |
| |
�� � � �������� � � (two parallel stories) | |
| |
| |
| |
Control-based design as a means for convergence | |
| |
| |
| |
A byte of systems theory | |
| |
| |
| |
Dynamic systems | |
| |
| |
| |
State-space representation | |
| |
| |
| |
Motion, equilibrium, stability | |
| |
| |
| |
The linear time-invariant (LTI) case | |
| |
| |
| |
Motion and equilibrium | |
| |
| |
| |
Stability | |
| |
| |
| |
Input-output representation of LTI systems | |
| |
| |
| |
The Z transform | |
| |
| |
| |
The transfer function | |
| |
| |
| |
Block diagrams | |
| |
| |
| |
Series connection | |
| |
| |
| |
Parallel connection | |
| |
| |
| |
Feedback (loop) connection | |
| |
| |
| |
The frequency response | |
| |
| |
| |
Definition | |
| |
| |
| |
Interpretation and use | |
| |
| |
| |
Time domain responses | |
| |
| |
| |
Impulse response of FIR systems | |
| |
| |
| |
Impulse response of IIR systems | |
| |
| |
| |
Step response of FIR and IIR systems | |
| |
| |
| |
Concluding remarks | |
| |
| |
| |
Problems | |
| |
| |
| |
Modelling for computing systems | |
| |
| |
| |
The quest for a computer physics | |
| |
| |
| |
Modelling and simulation | |
| |
| |
| |
Examples | |
| |
| |
| |
Core allocation | |
| |
| |
| |
Producer and consumer | |
| |
| |
| |
Transmission over wireless sensor networks | |
| |
| |
| |
Communication bandwidth partitioning | |
| |
| |
| |
Concluding remarks | |
| |
| |
| |
A byte of basic control theory | |
| |
| |
| |
Specifications | |
| |
| |
| |
Main control schemes | |
| |
| |
| |
Feedback and its power | |
| |
| |
| |
Feedback control synthesis | |
| |
| |
| |
Synthesis by transfer function assignment (set point tracking) | |
| |
| |
| |
Synthesis by transfer function assignment (disturbance rejection) | |
| |
| |
| |
Synthesis by dominant pole assignment | |
| |
| |
| |
Some typical feedback controllers | |
| |
| |
| |
Proportional control | |
| |
| |
| |
Integral control | |
| |
| |
| |
Proportional-integral (PI) control | |
| |
| |
| |
Standard controllers on simple plants | |
| |
| |
| |
From controller model to control law | |
| |
| |
| |
Managing control saturations | |
| |
| |
| |
Problems | |
| |
| |
| |
Scheduling | |
| |
| |
| |
Modelling | |
| |
| |
| |
The core phenomenon | |
| |
| |
| |
Control synthesis | |
| |
| |
| |
Inner loop | |
| |
| |
| |
Outer loop | |
| |
| |
| |
Complexity comparison with existing policies | |
| |
| |
| |
Simulation example | |
| |
| |
| |
Set point generation for (soft) real-time systems | |
| |
| |
| |
Overload detection and rescaling | |
| |
| |
| |
Reinitialisation and feedforward | |
| |
| |
| |
Experimental results and comparisons | |
| |
| |
| |
MiBench benchmark | |
| |
| |
| |
Hartstone benchmark | |
| |
| |
| |
Extended Hartstone benchmark | |
| |
| |
| |
Summary of results | |
| |
| |
| |
Set point generation for general purpose systems | |
| |
| |
| |
Tasks with periodic deadlines | |
| |
| |
| |
Tasks with a single deadline | |
| |
| |
| |
Tasks without deadlines | |
| |
| |
| |
Event-triggered tasks | |
| |
| |
| |
Parameter setting | |
| |
| |
| |
Simulation examples | |
| |
| |
| |
Concluding remarks | |
| |
| |
| |
Memory management | |
| |
| |
| |
Problem statement | |
| |
| |
| |
The plant model | |
| |
| |
| |
Requirements | |
| |
| |
| |
Control synthesis | |
| |
| |
| |
Simulation results | |
| |
| |
| |
Implementation-related considerations | |
| |
| |
| |
Concluding remarks | |
| |
| |
| |
A byte of advanced control techniques | |
| |
| |
| |
Model Predictive Control | |
| |
| |
| |
Predictive control | |
| |
| |
| |
Review on predictive control techniques | |
| |
| |
| |
State-space models | |
| |
| |
| |
Predictive control within a single optimisation window | |
| |
| |
| |
Prediction of state and output variables | |
| |
| |
| |
Optimisation | |
| |
| |
| |
Receding-horizon predictive control | |
| |
| |
| |
Closed-loop control system | |
| |
| |
| |
Model identification and adaptive systems | |
| |
| |
| |
Least squares | |
| |
| |
| |
Persistent excitation | |
| |
| |
| |
Recursive least squares | |
| |
| |
| |
Adaptive control techniques | |
| |
| |
| |
Online identification and adaptive control | |
| |
| |
| |
Adaptive identification | |
| |
| |
| |
Adaptive identification algorithms with forgetting factor | |
| |
| |
| |
Problems | |
| |
| |
| |
Resource allocation | |
| |
| |
| |
Literature review | |
| |
| |
| |
Control-based design | |
| |
| |
| |
Sensing | |
| |
| |
| |
Actuation | |
| |
| |
| |
Control | |
| |
| |
| |
Heuristic | |
| |
| |
| |
Basic control | |
| |
| |
| |
Adaptive control | |
| |
| |
| |
Modelling for advanced control | |
| |
| |
| |
Regulating with tuning | |
| |
| |
| |
Experimental results | |
| |
| |
| |
Swaptions | |
| |
| |
| |
Vips | |
| |
| |
| |
Concluding remarks | |
| |
| |
| |
Power-awareness | |
| |
| |
| |
A case study | |
| |
| |
| |
Step 1: Analysis, sensors and actuators | |
| |
| |
| |
Step 2a: Data collection | |
| |
| |
| |
Step 2b: Control design | |
| |
| |
| |
Step 3: Control structure parameterisation | |
| |
| |
| |
Experimental results | |
| |
| |
| |
Generalisation | |
| |
| |
| |
Step 1 | |
| |
| |
| |
Step 2a | |
| |
| |
| |
Step 2b | |
| |
| |
| |
Step 3 | |
| |
| |
| |
Concluding remarks | |
| |
| |
| |
An experimental OS: Miosix | |
| |
| |
| |
Motivations | |
| |
| |
| |
Requirements and design decisions | |
| |
| |
| |
Architecture of Miosix | |
| |
| |
| |
The Miosix scheduler | |
| |
| |
| |
Pluggable schedulers in Miosix | |
| |
| |
| |
I+PI implementation in Miosix | |
| |
| |
| |
Sensors and actuators | |
| |
| |
| |
Context switch implementation | |
| |
| |
| |
Future directions | |
| |
| |
| |
Future perspectives and cyber-physical systems | |
| |
| |
| |
Control-related concepts coverage | |
| |
| |
| |
Problems not treated herein | |
| |
| |
| |
Time synchronisation | |
| |
| |
| |
Bandwidth scheduling | |
| |
| |
| |
Peripheral and queue management | |
| |
| |
| |
Envisaged extensions | |
| |
| |
| |
Multi-core and multi-CPU scheduling | |
| |
| |
| |
Bridging non-real-time and real-time | |
| |
| |
| |
Thermal issues | |
| |
| |
| |
A cyber-physical perspective | |
| |
| |
| |
Code fragments | |
| |
| |
| |
Simulation code | |
| |
| |
| |
Bandwidth allocation simulation | |
| |
| |
| |
Per-process swap-out partitioning | |
| |
| |
| |
Full memory management simulator | |
| |
| |
| |
Scheduler simulator | |
| |
| |
| |
An implementation example | |
| |
| |
References | |
| |
| |
Index | |