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| ARM Embedded Systems | |
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| The RISC Design Philosophy | |
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| The ARM Design Philosophy | |
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| Embedded System Hardware | |
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| Embedded System Software | |
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| Summary | |
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| ARM Processor Fundamentals | |
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| Registers | |
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| Current Program Status Register | |
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| Pipeline | |
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| Exceptions, Interrupts, and the Vector Table | |
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| Core Extensions | |
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| Architecture Revisions | |
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| ARM Processor Families | |
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| Summary | |
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| Introduction to the ARM Instruction Set | |
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| Data Processing Instructions | |
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| Branch Instructions | |
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| Load-Store Instructions | |
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| Software Interrupt Instruction | |
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| Program Status Register Instructions | |
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| Loading Constants | |
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| ARMv5E Extensions | |
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| Conditional Execution | |
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| Summary | |
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| Introduction to the Thumb Instruction Set | |
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| Thumb Register Usage | |
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| ARM-Thumb Interworking | |
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| Other Branch Instructions | |
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| Data Processing Instructions | |
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| Single-Register Load-Store Instructions | |
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| Multiple-Register Load-Store Instructions | |
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| Stack Instructions | |
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| Software Interrupt Instruction | |
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| Summary | |
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| Efficient C Programming | |
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| Overview of C Compilers and Optimization | |
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| Basic C Data Types | |
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| C Looping Structures | |
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| Register Allocation | |
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| Function Calls | |
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| Pointer Aliasing | |
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| Structure Arrangement | |
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| Bit-fields | |
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| Unaligned Data and Endianness | |
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| Division | |
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| Floating Point | |
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| Inline Functions and Inline Assembly | |
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| Portability Issues | |
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| Summary | |
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| Writing and Optimizing ARM Assembly Code | |
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| Writing Assembly Code | |
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| Profiling and Cycle Counting | |
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| Instruction Scheduling | |
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| Register Allocation | |
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| Conditional Execution | |
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| Looping Constructs | |
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| Bit Manipulation | |
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| Efficient Switches | |
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| Handling Unaligned Data | |
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| Summary | |
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| Optimized Primitives | |
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| Double-Precision Integer Multiplication | |
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| Integer Normalization and Count Leading Zeros | |
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| Division | |
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| Square Roots | |
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| Transcendental Functions: log, exp, sin, cos | |
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| Endian Reversal and Bit Operations | |
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| Saturated and Rounded Arithmetic | |
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| Random Number Generation | |
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| Summary | |
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| Digital Signal Processing | |
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| Representing a Digital Signal | |
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| Introduction to DSP on the ARM | |
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| FIR filters | |
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| IIR Filters | |
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| The Discrete Fourier Transform | |
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| Summary | |
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| Exception and Interruput Handling | |
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| Exception Handling | |
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| Interrupts | |
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| Interrupt Handling Schemes | |
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| Summary | |
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| Firmware | |
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| Firmware and Bootloader | |
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| Example: Sandstone | |
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| Summary | |
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| Embedded Operating Systems | |
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| Fundamental Components | |
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| Example: Simple Little Operating System | |
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| Summary | |
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| Caches | |
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| The Memory Hierarchy and Cache Memory | |
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| Cache Architecture | |
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| Cache Policy | |
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| Coprocessor 15 and Caches | |
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| Flushing and Cleaning Cache Memory | |
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| Cache Lockdown | |
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| Caches and Software Performance | |
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| Summary | |
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| Memory Protection Units | |
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| Protected Regions | |
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| Initializing the MPU, Caches, and Write Buffer | |
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| Demonstration of an MPU system | |
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| Summary | |
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| Memory Management Units | |
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| Moving from an MPU to an MMU | |
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| How Virtual Memory Works | |
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| Details of the ARM MMU | |
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| Page Tables | |
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| The Translation Lookaside Buffer | |
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| Domains and Memory Access Permission | |
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| The Caches and Write Buffer | |
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| Coprocessor 15 and MMU Configuration | |
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| The Fast Context Switch Extension | |
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| Demonstration: A Small Virtual Memory System | |
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| The Demonstration as mmuSLOS | |
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| Summary | |
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| The Future of the Architecture | |
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| Advanced DSP and SIMD Support in ARMv6 | |
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| System and Multiprocessor Support Additions to ARMv6 | |
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| ARMv6 Implementations | |
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| Future Technologies beyond ARMv6 | |