Rezaur Rahman is a Senior Staff Engineer in the Intel Software and Services Group. He played a key role in the inception and development of the Xeon Phi coprocessor for technical computing applications by demonstrating the viability of applying Intel s manycore graphics processor codenamed Larrabee to solving technical computing problems. He led the worldwide technical enabling team for Intel Xeon Phi products, focused on porting and optimizing applications on the Xeon Phi coprocessor for hundreds of technical computing customers. He has worked internally with hardware architects and Intel compiler and tools teams to optimize and add features to improve the performance of Intel Many… Integrated Core (MIC) and Xeon Phi software and hardware components. With 25 years experience in computer architecture and software design, Rahman contributes his expertise in technical code optimization, performance tuning, and hardware microarchitectural analysis in the HPC domain to various industry standardization groups such as the World Wide Web Consortium (W3C). Rahman holds a master s degree in computer science from Texas A&M University and a bachelor s in electrical engineering from Bangladesh University of Engineering and Technology.