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| Preface | |
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| Notation used in text | |
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| The Building Blocks | |
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| Binary numbers | |
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| Numbers within a computing machine | |
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| Adding binary integers | |
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| Representing signed integers | |
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| Addition and subtraction of signed integers | |
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| Two's complement theory | |
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| Use of hexadecimal representation | |
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| Problems | |
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| Logic expressions | |
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| Logic - the bank vault | |
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| Evaluating the logic expression for the bank vault | |
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| Another solution | |
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| Simplifying logical expressions | |
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| Using the squares | |
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| Simplified logic for bank vault access | |
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| Rules for simplifying logical expressions using a map | |
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| Karnaugh-Veitch program, KVMap | |
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| Prime implicant selection table | |
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| Quine-McCluskey method | |
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| Finding pairs of adjacent minterms | |
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| Finding larger groups of minterms | |
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| Problems | |
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| Electronic logic circuits | |
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| Electronic controller | |
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| Development of the bank vault controller design | |
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| Gates - electronic circuits that perform logical operations | |
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| Decoder circuit | |
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| Multiplexer circuit | |
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| Flip-flops | |
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| Basic flip-flop | |
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| Edge-triggered JK flip-flop | |
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| Edge-triggered D flip-flop | |
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| Storage registers | |
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| State machines | |
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| State Machine 1 using D type flip-flops | |
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| State Machine 2 using D type flip-flops | |
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| State Machine 1 using JK flip-flops | |
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| State Machine 2 using JK flip-flops | |
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| Programmable logic devices | |
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| Problems | |
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| Computer arithmetic | |
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| Circuit to add numbers | |
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| Adder/Subtractor | |
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| Arithmetic and logic unit | |
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| Shifting data | |
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| Fast adders | |
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| Floating-point numbers | |
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| Special quantities | |
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| Smallest and largest numbers | |
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| Denormalized numbers | |
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| Multiplication and division | |
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| Addition and subtraction | |
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| Rounding | |
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| Precision | |
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| Problems | |
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| Computing Machines | |
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| Computer design | |
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| A manual computing system | |
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| Storing data and program instructions | |
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| Connecting the machine components | |
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| Architecture of Simple Machine | |
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| Data paths | |
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| Program Counter | |
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| Operation of Simple Machine | |
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| More general view of the design of Simple Machine | |
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| Four-address format | |
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| Three-address format | |
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| Two-address format | |
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| One-address format | |
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| Zero-address format | |
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| Improvements to Simple Machine | |
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| Data storage within the microprocessor | |
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| Status flags | |
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| Architecture of the G80 microprocessor | |
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| Problems | |
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| Instruction set and code assembly | |
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| Programmer's model | |
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| Instruction format and addressing modes | |
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| Converting the source code to machine code - manual assembly | |
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| Using the assembler | |
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| Assembly language | |
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| Types of instruction | |
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| Data transfer instructions | |
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| Arithmetical and logical instructions | |
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| Skew instructions | |
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| Program control instructions | |
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| Problems | |
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| Program structures | |
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| Program control structures | |
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| Sequence | |
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| While loop | |
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| If/Else | |
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| Data structures | |
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| Look-up table | |
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| Lists of data | |
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| Character strings | |
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| Jump table | |
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| Two-dimensional arrays | |
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| Index registers IX and IY | |
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| Stack | |
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| Subroutines | |
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| Example of subroutine | |
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| Parameter pass | |
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| Probl122 | |
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| Simple computer circuits | |
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| G80 external connections | |
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| Read Only Memory Device - ROM | |
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| COMP1 computer - G80 with ROM only | |
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| G80 read cycle | |
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| RAM device | |
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| COMP2 computer - G80 with ROM and RAM | |
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| G80 write cycle | |
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| COMP3 computer | |
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| Microprocessor control signals | |
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| Problems | |
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| Input and output ports | |
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| Simple output port | |
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| Port address space | |
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| A simple input port | |
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| Programmable ports | |
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| Serial data transmission - UART | |
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| Problems | |
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| Input and output methods | |
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| Simple input and output | |
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| Handshaking | |
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| More about handshaking | |
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| Simple output to a slow device | |
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| Do-forever loop | |
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| Processor interrupt | |
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| Possible interrupt mechanisms | |
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| Interrupt priority mechanisms | |
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| Non-maskable interrupt | |
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| G80 interrupt mechanisms | |
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| Interrupt mode 0 - RSTn* | |
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| Interrupt mode 1 - poll* | |
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| Interrupt mode 2 - vectored | |
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| Vectored interrupt sequence of events | |
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| Direct memory access | |
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| Problems | |
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| More devices | |
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| Counter device and its use in a conveyor belt | |
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| Timer device | |
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| Calendar device | |
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| Pottery kiln | |
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| Multitaskin | |
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| Problems | |
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| Assembler and linker tools | |
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| How an assembler works | |
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| First pass | |
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| Second pass | |
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| Practical assemblers | |
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| Relocatable segments | |
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| Linker | |
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| Link example 1 - single segment | |
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| Link example 2 - multiple segments | |
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| Link example 3 - global variables | |
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| Intel format file | |
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| High-level languages | |
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| Problems | |
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| The control unit | |
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| Requirements of the control unit | |
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| Register transfers | |
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| Instruction fetch | |
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| Examples of instruction execution | |
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| ld d, c | |
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| Add a,b | |
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| ld a, n | |
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| Add a, (hl) | |
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| ld (nn), a | |
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| jp nn | |
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| jp z, nn | |
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| Hardwired controller | |
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| More about the hardwired controller | |
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| Microprogrammed control | |
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| Sequence generator | |
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| Selecting a sequence | |
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| Conditional branching | |
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| Problems | |
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| Larger Computers | |
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| Larger computers | |
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| General-purpose computers | |
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| Memory bottleneck | |
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| Storage within a computer | |
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| Data bus width and memory address space | |
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| Addressing modes | |
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| New addressing modes | |
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| Importance of compiler | |
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| Organization of 32-bit memory | |
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| Memory interleaving | |
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| Burst cycle memory access | |
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| Instruction queue | |
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| Locality of reference | |
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| Operating systems | |
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| Booting the operating system* | |
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| Cache memory | |
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| Basic operation of cache | |
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| Cache organization - direct mapping | |
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| Memory write operations | |
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| How many words should be stored in a cache line? | |
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| Critique | |
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| Cache organization - set-associative mapping | |
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| Line replacement | |
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| Cache organization - fully associative mapping | |
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| Problems | |
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| Memory management | |
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| Virtual and physical addresses - imaginary and real memory | |
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| Pages and page frames | |
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| Page Tables | |
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| Handling a page fault | |
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| Least-recently used | |
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| Least-frequently used | |
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| Not used recently | |
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| Page size | |
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| Two-level paging* | |
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| Translation look-aside buffer | |
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| Memory protection | |
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| Problems | |
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| G80 instruction set | |
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| ASCII character codes | |
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| Specifications of the input and output devices | |
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| The GDS assembler and linker | |
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| Index | |