Fundamentals of Logic Design

ISBN-10: 0534378048

ISBN-13: 9780534378042

Edition: 5th 2004

Authors: Charles H. Roth

List price: $325.95
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Updated with modern coverage, a streamlined presentation, and an excellent CD-ROM, this fifth edition achieves a balance between theory and application. Author Charles H. Roth, Jr. carefully presents the theory that is necessary for understanding the fundamental concepts of logic design while not overwhelming students with the mathematics of switching theory. Divided into 20 easy-to-grasp study units, the book covers such fundamental concepts as Boolean algebra, logic gates design, flip-flops, and state machines. By combining flip-flops with networks of logic gates, students will learn to design counters, adders, sequence detectors, and simple digital systems. After covering the basics, this text presents modern design techniques using programmable logic devices and the VHDL hardware description language.
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Book details

List price: $325.95
Edition: 5th
Copyright year: 2004
Publisher: Course Technology
Publication date: 6/11/2003
Binding: Hardcover
Pages: 720
Size: 8.00" wide x 9.00" long x 1.25" tall
Weight: 3.036
Language: English

Introduction: number systems and conversion
Digital Systems and Switching Circuits
Number Systems and Conversion
Binary Arithmetic
Representation of Negative Numbers
Binary Codes
Boolean algebra
Basic Operations
Boolean Expressions and Truth Tables
Basic Theorems
Commutative, Associative, and Distributive Laws
Simplification Theorems
Multiplying Out and Factoring
DeMorgan's Laws
Boolean algebra (continued)
Multiplying Out and Factoring Expressions
Exclusive-OR and Equivalence Operations
The Consensus Theorem
Algebraic Simplification of Switching Expressions
Proving Validity of an Equation
Applications of boolean algebra: minterm and maxterm expressions
Conversion of English Sentences to Boolean Equations
Combinational Logic Design Using a Truth Table
Minterm and Maxterm Expansions
General Minterm and Maxter m Expansions
Incompletely Specified Functions
Examples of Truth Table Construction
Design of Binary Adders
Karnaugh maps
Minimum Forms of Switching Functions
Two- and Three-Variable Karnaugh Maps
Four-Variable Karnaugh Maps
Determination of Minimum Expressions Using Essential Prime Implicants
Five-Variable Karnaugh Maps
Other Uses of Karnaugh Maps
Other Forms of Ka rnaugh Maps
Quine-mcclusky method
Determination of Prime Implicants
The Prime Implicant Chart
Petrick's Method
Simplification of Incompletely Specified Functions
Simplification Using Map-Entered Variables
Multi-level gate circuits: nand and nor gates
Multi-Level Gate Circuits
NAND and NOR Gates
Design of Two-Level Circuits Using NAND and NOR ?Gates
Design of Multi-Level NAND and NOR Gate Circuits
Circuit Conversion Using Alternative Gate Symbols
Design of Two-Level, Multiple-Output Circuits Determination of Essential Prime Implicants for Multiple-Output Realization
Multiple-Output NAND and NOR Circuits
Combinational circuit design and simulation using gates
Review of Combinational Circuit Design
Design of Circuits with Limited Gate Fan-In
Gate Delays and Timing Diagrams
Hazards in Combinational Logic
Simulation and Testing of Logic Circuits
Multiplexers, decodes, and programmable logic devices
Three-State Buffers
Decoders and Encoders
Read-Only Memories
Programmable Logic Devices
Complex Programmable Logic Devices
Field Programmable Gate Arrays
Introduction to vhdl
VHDL Description of Combinational Circuits
VHDL Models for Multiplexers
VHDL Modules
Signals and Constants
VHDL Operators
Packages and Libraries
IEEE Standard Logic
Compilation and Simulation of VHDL Code
Latches and flip-flops
Set-Reset Latch
Gated D Latch
Edge-Triggered D Flip-Flop
S-R Flip-Flop
J-K Flip-Flop
T Flip-Flop
Flip-Flops with Additional Inputs
Registers and counters
Registers and Register Transfers
Shift Registers
Design of Binary Counters
Counters for Other Sequences
Counter Design Using S-R and J-K Flip-XFlops
Derivation of Flip-Flop Input Equations-Summary
Analysis of clocked sequential circuits
A Sequential Parity Checker
Analysis by Signal Tracing and Timing Charts
State Tables and Graphs
General Models for Sequential Circuits
Derivation of state graphs and tables
Design of a Sequence Detector
More Complex Design Problems
Guidelines for Construction of State Graphs
Serial Data Code Conversion
Alphanumeric State Graph Notation
Reduction of state tables state assignment
Elimination of Redundant States
Equivalent States
Determination of State Equivalence Using an Implication Table
Equivalent Sequential Circuits
Incompletely Specified State Tables
Derivation of Flip-Flop Input Equations
Equivalent State Assignments
Guidelines for State Assignment
Using a One-Hot State Assignment
Sequential Circuit Design
Summary of Design Procedure for Sequential Circuits
Design Example-Code Converter
Design of Iterative Circuits
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