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Cmos Mixed-Signal Circuit Design

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ISBN-10: 0470290269

ISBN-13: 9780470290262

Edition: 2nd 2009

Authors: R. Jacob Baker

List price: $169.95
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Description:

Analog signal processing circuit blocks implemented in mixed-signal systems utilize more digital signal processing where the quality of the analog components can be reduced at the cost of digital system complexity. Discussing these design techniques from a circuit designer's point of view, CMOS is an advanced guide to mixed-signal circuit design that will bring designers rapidly up to speed. This new edition features additional examples and more, smaller chapters to make the information more accessible to graduate students as well as professionals who want to improve their skills in this area.
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Book details

List price: $169.95
Edition: 2nd
Copyright year: 2009
Publisher: John Wiley & Sons, Incorporated
Publication date: 12/10/2008
Binding: Hardcover
Pages: 352
Size: 6.50" wide x 9.20" long x 1.00" tall
Weight: 1.540
Language: English

Preface
Signals, Filters, and Tools
Sinusoidal Signals
The Pendulum Analogy
Describing Amplitude in the x-y Plane
In-Phase and Quadrature Signals
The Complex (z-) Plane
Comb Filters
The Digital Comb Filter
The Digital Differentiator
An Intuitive Discussion of the z-Plane
Comb Filters with Multiple Delay Elements
The Digital Integrator
The Delaying Integrator
An Important Note
Representing Signals
Exponential Fourier Series
Fourier Transform
Dirac Delta Function (Unit Impulse Response)
Sampling and Aliasing
Sampling
Impulse Sampling
A Note Concerning the AAF and the RCF
Time Domain Description of Reconstruction
An Important Note
Decimation
The Sample-and-Hold (S/H)
S/H Spectral Response
The Reconstruction Filter (RCF)
Circuit Concerns for Implementing the S/H
An Example
The Track-and-Hold (T/H)
Interpolation
Zero Padding
Hold Register
Linear Interpolation
K-Path Sampling
Switched-Capacitor Circuits
Non-Overlapping Clock Generation
Circuits
Implementing the S/H
Finite Op-Amp Gain-Bandwidth Product
Autozeroing
Correlated Double Sampling (CDS)
Selecting Capacitor Sizes
The S/H with Gain
Implementing Subtraction in the S/H
A Single-Ended to Differential Output S/H
The Discrete Analog Integrator (DAI)
A Note Concerning Block Diagrams
Fully-Differential DAI
DAI Noise Performance
Analog Filters
Integrator Building Blocks
Lowpass Filters
Active-RC Integrators
Effects of Finite Op-Amp Gain Bandwidth Product, f[subscript un]
Active-RC SNR
MOSFET-C Integrators
Why Use an Active Circuit (an Op-Amp)?
g[subscript m]-C (Transconductor-C) Integrators
Common-Mode Feedback Considerations
A High-Frequency Transconductor
Discrete-Time Integrators
An Important Note
Exact Frequency Response of an Ideal Discrete-Time Filter
Filtering Topologies
The Bilinear Transfer Function
Active-RC Implementation
Transconductor-C Implementation
Switched-Capacitor Implementation
The Biquadratic Transfer Function
Active-RC Implementation
Switched-Capacitor Implementation
High Q
Q Peaking and Instability
Transconductor-C Implementation
Digital Filters
SPICE Models for DACs and ADCs
The Ideal DAC
SPICE Modeling the Ideal DAC
The Ideal ADC
Number Representation
Increasing Word Size (Extending the Sign-Bit)
Adding Numbers and Overflow
Subtracting Numbers in Two's Complement Format
Sinc-Shaped Digital Filters
The Counter
Aliasing
The Accumulate-and-Dump
Lowpass Sinc Filters
Averaging without Decimation: A Review
Cascading Sinc Filters
Finite and Infinite Impulse Response Filters
Bandpass and Highpass Sinc Filters
Canceling Zeroes to Create Highpass and Bandpass Filters
Frequency Sampling Filters
Interpolation using Sinc Filters
Additional Control
Cascade of Integrators and Combs
Decimation using Sinc Filters
Filtering Topologies
FIR Filters
Stability and Overflow
Overflow
The Bilinear Transfer Function
The Canonic Form (or Standard Form) of a Digital Filter
General Canonic Form of a Recursive Filter
The Biquadratic Transfer Function
Comparing Biquads to Sinc-Shaped Filters
A Comment Concerning Multiplications
Data Converter SNR
Quantization Noise
Viewing the Quantization Noise Spectrum Using Simulations
Bennett's Criteria
An Important Note
RMS Quantization Noise Voltage
Treating Quantization Noise as a Random Variable
Quantization Noise Voltage Spectral Density
Calculating Quantization Noise from a SPICE Spectrum
Power Spectral Density
Signal-to-Noise Ratio (SNR)
Effective Number of Bits
Coherent Sampling
Signal-to-Noise Plus Distortion Ratio
Spurious Free Dynamic Range
Dynamic Range
Specifying SNR and SNDR
Clock Jitter
Using Oversampling to Reduce Sampling Clock Jitter Stability Requirements
A Practical Note
A Tool: The Spectral Density
The Spectral Density of Deterministic Signals: An Overview
The Spectral Density of Random Signals: An Overview
Specifying Phase Noise from Measured Data
Improving SNR using Averaging
An Important Note
Using Averaging to Improve SNR
Ideal Signal-to-Noise Ratio
Linearity Requirements
Adding a Noise Dither
Jitter
Anti-Aliasing Filter
Using Feedback to Improve SNR
Data Converter Design Basics
The One-Bit ADC and DAC
Passive Noise-Shaping
Signal-to-Noise Ratio
Decimating and Filtering the Modulator's Output
SNR Calculation using a Sinc Filter
Offset, Matching, and Linearity
Resistor Mismatch
The Feedback DAC
DAC Offset
Linearity of the First-Order Modulator
Dead Zones
Improving SNR and Linearity
Second-Order Passive Noise-Shaping
Passive Noise-Shaping Using Switched-Capacitors
Increasing SNR using K-Paths
Revisiting Switched-Capacitor Implementations
Effects of the Added Amplifier on Linearity
Improving Linearity Using an Active Circuit
Second-Order Noise-Shaping
Signal-to-Noise Ratio
Discussion
Noise-Shaping Data Converters
First-Order Noise Shaping
A Digital First-Order NS Demodulator
Modulation Noise in First-Order NS Modulators
RMS Quantization Noise in a First-Order Modulator
Decimating and Filtering the Output of a NS Modulator
Pattern Noise from DC Inputs (Limit Cycle Oscillations)
Integrator and Forward Modulator Gain
Comparator Gain, Offset, Noise, and Hysteresis
Op-Amp Gain (Integrator Leakage)
Op-Amp Settling Time
Op-Amp Offset
Op-Amp Input-Referred Noise
Practical Implementation of the First-Order NS Modulator
Second-Order Noise-Shaping
Second-Order Modulator Topology
Integrator Gain
Implementing Feedback Gains in the DAI
Using Two Delaying Integrators to Implement the Second-Order Modulator
Selecting Modulator (Integrator) Gains
Noise-Shaping Topologies
Higher-Order Modulators
M[superscript th]-Order Modulator Topology
Filtering the Output of an M[superscript th]-Order NS Modulator
Implementing Higher-Order, Single-Stage Modulators
Multi-Bit Modulators
Simulating a Multibit NS Modulator Using SPICE
Error Feedback
Implementation Concerns
Cascaded Modulators
Second-Order (1-1) Modulators
Third-Order (1-1-1) Modulators
Third-Order (2-1) Modulators
Implementing the Additional Summing Input
Bandpass Data Converters
Continuous-Time Bandpass Noise-Shaping
Passive-Component Bandpass Modulators
An Important Note
Active-Component Bandpass Modulators
Signal-to-Noise Ratio
Modulators for Conversion at Radio Frequencies
Switched-Capacitor Bandpass Noise-Shaping
Switched-Capacitor Resonators
Second-Order Modulators
Fourth-Order Modulators
A Common Error
A Comment about 1/f Noise
Digital I/Q Extraction to Baseband
A High-Speed Data Converter
The Topology
Clock Signals
Path Settling Time
Implementation
Filtering
Examples
Direction
Discussion
Understanding the Clock Signals
Practical Implementation
Generating the Clock Signals
The Components
The Switched-Capacitors
The Amplifier
The Clocked Comparator
The ADC
Conclusion
Index