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| Dedication | |
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| Preface | |
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| Background Elements | |
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| The Ideal Data Converter | |
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| Sampling | |
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| Undersampling | |
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| Sampling-time Jitter | |
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| Amplitude Quantization | |
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| Quantization Noise | |
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| Properties of the Quantization Noise | |
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| kT/C Noise | |
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| Discrete and Fast Fourier Transforms | |
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| Windowing | |
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| Coding Schemes | |
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| The D/A Converter | |
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| Ideal Reconstruction | |
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| Real Reconstruction | |
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| The Z-Transform | |
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| References | |
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| Data Converters Specifications | |
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| Type of Converter | |
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| Conditions of Operation | |
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| Converter Specifications | |
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| General Features | |
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| Static Specifications | |
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| Dynamic Specifications | |
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| Digital and Switching Specifications | |
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| References | |
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| Nyquist-Rate D/A Converters | |
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| Introduction | |
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| DAC Applications | |
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| Voltage and Current References | |
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| Types of Converters | |
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| Resistor based Architectures | |
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| Resistive Divider | |
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| X-Y Selection | |
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| Settling of the Output Voltage | |
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| Segmented Architectures | |
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| Effect of the Mismatch | |
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| Trimming and Calibration | |
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| Digital Potentiometer | |
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| R-2R Resistor Ladder DAC | |
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| Deglitching | |
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| Capacitor Based Architectures | |
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| Capacitive Divider DAC | |
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| Capacitive MDAC | |
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| "Flip Around" MDAC | |
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| Hybrid Capacitive-Resistive DACs | |
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| Current Source based Architectures | |
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| Basic Operation | |
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| Unity Current Generator | |
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| Random Mismatch with Unary Selection | |
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| Current Sources Selection | |
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| Current Switching and Segmentation | |
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| Switching of Current Sources | |
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| Other Architectures | |
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| References | |
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| Nyquist Rate A/D Converters | |
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| Introduction | |
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| Timing Accuracy | |
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| Metastability error | |
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| Full-Flash Converters | |
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| Reference Voltages | |
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| Offset of Comparators | |
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| Offset Auto-zeroing | |
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| Practical Limits | |
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| Sub-Ranging and Two-Step Converters | |
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| Accuracy Requirements | |
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| Two-step Converter as a Non-linear Process | |
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| Folding and Interpolation | |
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| Double Folding | |
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| Interpolation | |
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| Use of Interpolation in Flash Converters | |
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| Use of Interpolation in Folding Architectures | |
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| Interpolation for Improving Linearity | |
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| Time-Interleaved Converters | |
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| Accuracy requirements | |
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| Successive Approximation Converter | |
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| Errors and Error Correction | |
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| Charge Redistribution | |
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| Pipeline Converters | |
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| Accuracy Requirements | |
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| Digital Correction | |
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| Dynamic Performances | |
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| Sampled-data Residue Generator | |
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| Other Architectures | |
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| Cyclic (or Algorithmic) Converter | |
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| Integrating Converter | |
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| Voltage-to-Frequency Converter | |
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| References | |
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| Circuits for Data Converters | |
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| Sample-and-Hold | |
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| Diode Bridge S&H | |
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| Diode Bridge Imperfections | |
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| Improved Diode Bridge | |
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| Switched Emitter Follower | |
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| Circuit Implementation | |
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| Complementary Bipolar S&H | |
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| Features of S&Hs with BJT | |
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| CMOS Sample-and-Hold | |
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| Clock Feed-through | |
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| Clock Feed-through Compensation | |
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| Two-stages OTA as T&H | |
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| Use of the Virtual Ground in CMOS S&H | |
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| Noise Analysis | |
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| CMOS Switch with Low Voltage Supply | |
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| Switch Bootstrapping | |
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| Folding Amplifiers | |
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| Current-Folding | |
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| Voltage Folding | |
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| Voltage-to-Current Converter | |
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| Clock Generation | |
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| References | |
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| Oversampling and Low Order [Sigma Delta] Modulators | |
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| Introduction | |
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| Delta and Sigma-Delta Modulation | |
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| Noise Shaping | |
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| First Order Modulator | |
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| Intuitive Views | |
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| Use of 1-bit Quantization | |
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| Second Order Modulator | |
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| Circuit Design Issues | |
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| Offset | |
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| Finite Op-Amp Gain | |
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| Finite Op-Amp Bandwidth | |
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| Finite Op-Amp Slew-Rate | |
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| ADC Non-ideal Operation | |
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| DAC Non-ideal Operation | |
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| Architectural Design Issues | |
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| Integrator Dynamic Range | |
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| Dynamic Ranges Optimization | |
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| Sampled-data Circuit Implementation | |
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| Noise Analysis | |
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| Quantization Error and Dithering | |
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| Single-bit and Multi-bit | |
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| References | |
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| High-Order, CT [Sigma Delta] Converters and [Sigma Delta] DAC | |
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| SNR Enhancement | |
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| High Order Noise Shaping | |
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| Single Stage Architectures | |
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| Stability Analysis | |
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| Weighted Feedback Summation | |
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| Modulator with Local Feedback | |
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| Chain of Integrators with Distributed Feedback | |
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| Cascaded [Sigma Delta] Modulator | |
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| Dynamic range for MASH | |
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| Continuous-time [Sigma Delta] Modulators | |
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| S&H Limitations | |
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| CT Implementations | |
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| Design of CT from Sampled-Data Equivalent | |
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| Band-Pass [Sigma Delta] Modulator | |
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| Interleaved N-Path Architecture | |
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| Synthesis of the NTF | |
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| Oversampling DAC | |
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| 1-bit DAC | |
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| Double Return-to-zero DAC | |
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| References | |
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| Digital Enhancement Techniques | |
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| Introduction | |
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| Error Measurement | |
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| Trimming of Elements | |
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| Foreground Calibration | |
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| Background Calibration | |
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| Gain and Offset in Interleaved Converters | |
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| Offset Calibration without Redundancy | |
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| Dynamic Matching | |
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| Butterfly Randomization | |
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| Individual Level Averaging | |
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| Data Weighted Averaging | |
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| Decimation and Interpolation | |
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| Decimation | |
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| Interpolation | |
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| References | |
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| Testing of D/A and A/D Converters | |
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| Introduction | |
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| Test Board | |
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| Quality and Reliability Test | |
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| Data Processing | |
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| Best-fit-line | |
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| Sine Wave Fitting | |
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| Histogram Method | |
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| Static DAC Testing | |
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| Transfer Curve Test | |
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| Superposition of Errors | |
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| Non-linearity Errors | |
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| Dynamic DAC Testing | |
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| Spectral Features | |
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| Conversion Time | |
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| Glitch Energy | |
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| Static ADC Testing | |
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| Code Edge Measurement | |
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| Dynamic ADC Testing | |
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| Time Domain Parameters | |
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| Improving the Spectral Purity of Sine Waves | |
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| Aperture Uncertainty Measure | |
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| Settling-time Measure | |
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| Use of FFT for Testing | |
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| References | |
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| Index | |