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| Introduction | |
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| Dissecting the Title | |
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| A Brief History of Logic Design | |
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| Computation | |
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| Examples | |
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| Combinational Logic | |
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| Outputs as a Function of Inputs | |
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| Laws and Theorems of Boolean Logic | |
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| Realizing Boolean Formulas | |
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| Two-Level Logic | |
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| Motivation for Two-Level Simplification | |
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| Multi-level Logic | |
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| Motivation for Multi-Level Minimization | |
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| Working with Combinational Logic | |
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| Two-Level Simplification | |
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| Automating Two-level Simplification | |
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| Multi-level Simplification | |
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| Automating Multi-level Simplification | |
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| Time Response in Combinational Networks | |
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| Hardware Description Languages | |
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| Combinational Logic Technologies | |
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| History | |
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| Basic Logic Components | |
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| Two-Level and Multi-Level Logic | |
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| Non-gate Logic | |
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| Case Studies in Combinational Logic Design | |
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| Design Procedure | |
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| A Simple Process Line Control Problem | |
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| Telephone Keypad Decoder | |
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| Leap Year Calculation | |
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| Logic Function Unit | |
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| Adder Design | |
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| Arithmetic Logic Unit Design | |
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| Combinational Multiplier | |
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| Sequential Logic | |
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| Sequential Logic Elements | |
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| Timing Methodologies | |
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| Registers | |
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| Finite State Machines | |
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| Counters | |
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| The Concept of the State Machine | |
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| Basic Design Approach | |
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| Motivation for Optimization | |
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| Working with Finite State Machines | |
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| State Minimization/Reduction | |
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| State Assignment | |
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| Finite State Machine Partitioning | |
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| Hardware Description Languages | |
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| Sequential Logic Technologies | |
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| Basic Sequential Logic Components | |
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| FSM Design with Counters | |
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| FSM Design with Programmable Logic | |
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| FSM Design with More Sophisticated Programmable Logic | |
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| Case Study: Traffic Light Controller | |
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| Case Studies in Sequential Logic Design | |
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| A Finite String Recognizer | |
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| A Complex Counter | |
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| A Digital Combination Lock | |
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| A Memory Controller | |
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| A Sequential Multiplier | |
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| A Serial Line Transmitter/Receiver | |
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| Computer Organization | |
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| Structure of a Computer | |
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| Busing Strategies | |
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| Finite State Machines for Simple CPUs | |
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| Controller Implementation | |
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| Random Logic | |
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| Time State (Divide and Conquer) | |
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| Jump Counter | |
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| Branch Sequencers | |
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| Microprogramming | |
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| Epilogue | |