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SPARC Architecture, Assembly Language Programming, and C

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ISBN-10: 0130255963

ISBN-13: 9780130255969

Edition: 2nd 2000

Authors: Richard Paul

List price: $206.65
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For Assembly Language and Architecture courses emphasizing SPARC architecture found in computer science, engineering and business departments. Written from a programmer's perspective, this long-awaited revision introduces the SPARC assembly language to readers early on. Other introductory material encompasses making use of UNIX tools (the m4 macro processor; the assembler; the gnu emacs editor; and the gdb debugger). Further coverage includes a formal definition of the von Neumann machine, its relationship to programmable calculators, and to the JAVA bytecode and JAVA virtual machine. Not only is this book suitable for introductory computer architecture courses, but for programmers who…    
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Book details

List price: $206.65
Edition: 2nd
Copyright year: 2000
Publisher: Pearson Education
Publication date: 7/29/1999
Binding: Paperback
Pages: 528
Size: 8.60" wide x 11.00" long x 1.00" tall
Weight: 1.584
Language: English

Dr. Richard W. Paul is Director of Research and Professional Development at the Center for Critical Thinking and Chair of the National Council for Excellence in Critical Thinking. Dr. Paul is an internationally recognized authority on critical thinking, with eight books and over 200 articles on the subject. Dr. Paul has given lectures on critical thinking at many universities in both the United States and abroad, including Harvard, the University of Chicago, the University of Illinois, and the universities of Puerto Rico, Costa Rica, British Columbia, Toronto, and Amsterdam. He taught beginning and advanced courses in critical thinking at the university level for over 20 years. He has been…    

Preface
List of Figures
The Computer
Introduction
Calculators
Stack Calculators
The Use of Registers
Programmable Calculators
Machine Language Programming
m4: The Macro Processor
Macros with Arguments
Memory Location
Conditionals and Branching
The von Neumann Machine
The Stack Machine
The Java Virtual Machine
Accumulator Machines
Load/Store Machines
Assemblers
Summary
Exercises
Sparc Architecture
Introduction
Registers
SPARC Assembly Language Programming
An Example
Pipelining
The Example Continued
The Debugger gdb
Filling Delay Slots
Branching
Testing
Branches
Control Statements
While
Do
For
If Then
If Else
Annulled Unconditional Branch
Summary
Exercises
Digital Logic and Binary Numbers
Binary Hardware Devices
Decimal and Binary Number Systems
Octal and Hexadecimal Numbers
Converting from Decimal to Binary
Converting from Binary to Decimal
ASCII Representation of Characters
Bitwise Logical Operations
Synthetic Instructions Using %g0
Flags
Summary
Exercises
Binary Arithmetic
Introduction
Binary Numbers and Addition
Half and Full Adders
Modulus Arithmetic
Subtraction
Two's Complement Number Branching Conditions
Shifting
Unsigned Arithmetic
Unsigned Number Branching Conditions
Condition Code Tests
Multiplication
SPARC mulscc Instruction
Division
Extended Precision Arithmetic
Addition of Extended Precision Numbers
Subtraction of Extended Precision Numbers
Multiplication of Extended Precision Numbers
Summary
Exercises
The Stack
Memory
The Stack
The Frame Pointer
Addressing Stack Variables
Load Instructions
Store Instructions
Defining Stack Variable Offsets
An Example
One-Dimensional Arrays
Improvements to the Code
Summary
Exercises
Data Structures
Introduction
Array Storage and Addressing
Multidimensional Arrays
Lower Bounds Different from Zero
Array Bound Checking
Address Arithmetic
Structures
Structures as Automatic Variables
Nested Structures
Summary
Exercises
Subroutines
Introduction
Open Subroutines
Register Saving
Subroutine Linkage
Arguments to Subroutines
Examples
Return Values
Subroutines with Many Arguments
Leaf Subroutines
Pointers as Arguments to Subroutines
Summary
Exercises
Machine Instructions
Introduction
Instruction Decode
Format Three Instructions
Format One Instruction: The call Instruction
Format Two Instructions
Branch Instructions
Loading 32-Bit Constants
Summary
Exercises
External Data and Text
Introduction
External Variables
The text Section
The data Section
ASCII Data
Pointers
The .bss Section
The switch Statement
Relocation and Linking with Other Code
Makefiles
C Command Line Arguments
Summary
Exercises
Input/Output
Introduction
Memory Mapped I/O
Character Devices
Programmed I/O
Interrupt-Driven I/O
Block Devices
Directory Devices
Input/Output Processors
System I/O
Summary
Exercises
Floating-Point
Introduction
Fixed Binary Point Numbers
Scientific Notation
Floating-Point
The Floating-Point Processor
A Floating-Point Program
Debugging Single Presision Floating-Point Code
An Improved Version of the Code
Floating NaNs
Subnormal Numbers
Extended Precision Floating-Point
Debugging Floating Double Programs
Floating Quad Format
Function Calls
Tagged Arithmetic
Lisp
Tagged Arithmetic Instructions
Summary
Exercises
Traps and Exceptions
Introduction
Processor State Registers
Processor State Register
Window Invalid Mask Register
Trap Base Register
Floating-Point Processor State Register
Traps
Window Traps
Summary
Memory Management
Introduction
Virtual Memory and Paging
Page Descriptor Cache
Cache Memory
Context Switching
Summary
Other Architectures
Introduction
The PDP-11
The VAX-11
The MIPS Architecture
Summary
Exercises
Ultra Sparc
Introduction
64-Bit Virtual Memory Addresses
Superscalar Execution
Branch Prediction
Branch on Integer Register
Multiple Floating-Point Condition Codes
Move Register on Condition
Instruction and Data Prefetching
Nonfaulting Loads
Changes to Supervisor Mode
Summary
Macro Definitions
Register Name Macro Definitions
Multiplication by Constants
Introduction
m4 Built-in Macros
Conversion to Binary
Conversion to a Base 31 Number
Instruction Generation
User Mode Machine Instructions
Syntax
Arithmetic Instructions
Logical Instructions
Shift Instructions
Load Instructions
Store Instructions
Integer Branch Instructions
Trap Instructions
Control Instructions
Floating-Point Instructions
Floating-Point Branch Instructions
Synthetic Instructions and Pseudo-Ops
Instructions Sorted Alphabetically
Powers of 2
Macro Language Processor m4
Bibliography
Index