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| Foreword | |
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| Preface | |
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| Introduction to the System-on-Package (SOP) Technology | |
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| Introduction | |
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| Electronic System Trend to Digital Convergence | |
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| Building Blocks of an Electronic System | |
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| System Technologies Evolution | |
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| Five Major System Technologies | |
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| System-on-Board (SOB) Technology with Discrete Components | |
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| System-on-Chip (SOC) with Two or More System Functions on a Single Chip | |
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| Multichip Module (MCM): Package-Enabled Integration of Two or More Chips Interconnected Horizontally | |
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| Stacked ICs and Packages (SIP): Package-Enabled IC Integration with Two or More Chip Stacking (Moore's Law in the Third Dimension) | |
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| System-on-Package Technology (Module with the Best of IC and System Integration) | |
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| Miniaturization Trend | |
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| Comparison of the Five System Technologies | |
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| Status of SOP around the Globe | |
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| Opto SOP | |
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| RF SOP | |
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| Embedded Passives SOP | |
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| MEMS SOP | |
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| SOP Technology Implementations | |
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| SOP Technologies | |
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| Summary | |
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| Acknowledgment | |
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| References | |
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| Introduction to System-on-Chip (SOC) | |
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| Introduction | |
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| Key Customer Requirements | |
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| SOC Architecture | |
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| SOC Design Challenge | |
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| SOC Design Phase 1-SOC Definition and Challenges | |
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| SOC Design Phase II-SOC Create Process and Challenges | |
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| Summary | |
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| References | |
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| Stacked ICs and Packages (SIP) | |
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| SIP Definition | |
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| Definition | |
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| Applications | |
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| CEO Figure and SIP Categories | |
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| SIP Challenges | |
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| Materials and Process Challenges | |
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| Mechanical Challenges | |
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| Electrical Challenges | |
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| Thermal Challenges | |
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| Non-TSV SIP | |
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| Historical Evolution of Non-TSV SIP | |
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| Chip Stacking | |
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| Package Stacking | |
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| Chip Stacking versus Package Stacking | |
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| TSV SIP | |
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| Introduction | |
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| Historical Evolution of 3D TSV Technology | |
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| Basic TSV Technologies | |
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| Different 3D Integration Technologies using TSV | |
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| Si Carrier Technology | |
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| Future Trends | |
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| Acknowledgments | |
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| References | |
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| Mixed-Signal (SOP) Design | |
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| Introduction | |
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| Mixed-Signal Devices and Systems | |
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| Importance of Integration in Mobile Applications | |
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| Mixed-Signal Architecture | |
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| Mixed-Signal Design Challenges | |
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| Fabrication Technologies | |
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| Design of Embedded Passives in RF Front End | |
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| Embedded Inductors | |
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| Embedded Capacitors | |
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| Embedded Filters | |
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| Embedded Baluns | |
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| Filter-Balun Networks | |
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| Tunable Filters | |
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| Chip-Package Codesign | |
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| Low Noise Amplifier Design | |
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| Concurrent Oscillator Design | |
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| Design of WLAN Front-End Module | |
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| Design Tools | |
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| Synthesis of Embedded RF Circuits | |
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| Modeling of Signal and Power Delivery Networks | |
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| Rational Functions, Network Synthesis, and Transient Simulation | |
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| Design for Manufacturing | |
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| Coupling | |
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| Analog-to-Analog Coupling | |
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| Digital-to-Analog Coupling | |
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| Decoupling | |
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| Need for Decoupling in Digital Applications | |
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| Issues with SMD Capacitors | |
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| Embedded Decoupling | |
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| Characterization of Embedded Capacitors | |
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| Electromagnetic Bandgap (EBG) Structures | |
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| Analysis and Design of EBG Structures | |
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| Application of EBGs in Power Supply Noise Suppression | |
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| Radiation Analysis of EBGs | |
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| Summary | |
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| Acknowledgments | |
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| References | |
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| Radio Frequency System-on-Package (RF SOP) | |
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| Introduction | |
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| RF SOP Concept | |
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| Historical Evolution of RF Packaging Technologies | |
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| RF SOP Technologies | |
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| Modeling and Optimization | |
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| RF Substrate Materials Technologies | |
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| Antennas | |
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| Inductors | |
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| RF Capacitors | |
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| Resistors | |
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| Filters | |
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| Baluns | |
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| Combiners | |
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| RF MEMS Switches | |
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| RFIDs | |
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| Integrated RF Modules | |
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| WLAN | |
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| Intelligent Network Communicator (INC) | |
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| Future Trends | |
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| Acknowledgments | |
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| References | |
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| Integrated Chip-to-Chip Optoelectronic SOP | |
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| Introduction | |
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| Applications of Optoelectronic SOP | |
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| High-Speed Digital Systems and High-Performance Computing | |
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| RF-Optical Communication Systems | |
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| Integration Challenges in Thin-Film Optoelectronic SOP | |
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| Optical Alignment | |
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| Key Physical and Optical Properties of Thin-Film Optical Waveguide Materials | |
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| Advantages of Optoelectronic SOP | |
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| Comparison of High-Speed Electrical and Optical Wiring Performance | |
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| Wiring Density | |
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| Power Dissipation | |
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| Reliability | |
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| Evolution of Optoelectronic SOP Technology | |
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| Board-to-Board Optical Wiring | |
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| Chip-to-Chip Optical Interconnects | |
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| Optoelectronic SOP Thin-Film Components | |
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| Passive Thin-Film Lightwave Circuits | |
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| Active Optoelectronic SOP Thin-Film Components | |
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| Opportunities for 3D Lightwave Circuits | |
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| SOP Integration: Interface Optical Coupling | |
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| On-Chip Optical Circuits | |
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| Future Trends in Optoelectronic SOP | |
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| Summary | |
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| References | |
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| Table 6.1 References | |
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| SOP Substrate with Multilayer Wiring and Thin-Film Embedded Components | |
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| Introduction | |
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| Historical Evolution of Substrate Integration Technologies | |
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| SOP Substrate | |
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| Drivers and Challenges | |
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| Ultrathin-Film Wiring with Embedded Low-K Dielectrics, Cores, and Conductors | |
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| Embedded Passives | |
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| Embedded Actives | |
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| Miniaturized Thermal Materials and Structures | |
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| Future SOP Substrate Integration | |
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| Acknowledgments | |
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| References | |
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| Mixed-Signal (SOP) Reliability | |
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| System-Level Reliability Considerations | |
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| Failure Mechanisms | |
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| Design-for-Reliability | |
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| Reliability Verification | |
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| Reliability of Multifunction SOP Substrate | |
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| Materials and Process Reliability | |
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| Digital Function Reliability and Verification | |
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| RF Function Reliability and Verification | |
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| Optical Function Reliability and Verification | |
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| Multifunction System Reliability | |
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| Substrate-to-IC Interconnection Reliability | |
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| Factors Affecting the Substrate-to-IC Interconnection Reliability | |
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| 100-�m Flip-Chip Assembly Reliability | |
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| Reliability against Die Cracking | |
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| Solder Joint Reliability | |
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| Interfacial Adhesion and Effect of Moisture on Underfill Reliability | |
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| Future Trends and Directions | |
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| Extending Solder | |
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| Complaint Interconnects | |
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| Alternative to Solder and Nano Interconnects | |
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| Summary | |
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| References | |
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| MEMS Packaging | |
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| Introduction | |
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| Challenges in MEMS Packaging | |
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| Chip-Scale versus Wafer-Scale Packaging | |
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| Wafer Bonding Techniques | |
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| Direct Bonding | |
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| Bonding Using Intermediate Layers | |
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| Sacrificial Film-Based Sealing Techniques | |
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| Etching the Sacrificial Material | |
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| Decomposition of Sacrificial Polymers | |
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| Low-Loss Polymer Encapsulation Techniques | |
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| Techniques Utilizing Getters | |
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| Nonevaporable Getters | |
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| Thin-Film Getters | |
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| Improving MEMS Reliability through Getters | |
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| Interconnections | |
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| Assembly | |
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| Summary and Future Trends | |
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| References | |
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| Wafer-Level SOP | |
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| Introduction | |
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| Definition | |
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| Wafer-Level Packaging-Historical Evolution | |
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| Buildup Wiring and Redistribution | |
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| IC-Package Pitch Gap | |
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| Redistribution Layers on Si to Close the Pitch Gap | |
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| Wafer-Level Thin-Film Embedded Components | |
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| Embedded Thin-Film Components in the ReDistribution Layer (RDL) | |
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| Wafer-Level Packaging and Interconnections (WLPI) | |
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| Classes of Wafer-Level Packaging and Interconnections (WLPI) | |
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| Rigid Interconnections | |
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| WLSOP Assembly | |
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| WLSOP | |
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| Wafer-Level Probing and Burn-In | |
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| Summary | |
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| Acknowledgments | |
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| References | |
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| Thermal SOP | |
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| Fundamentals of Thermal SOP | |
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| Thermal Implications of SOP | |
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| System-Level Thermal Constraints in SOP-Based Portables | |
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| Thermal Sources in SOP Modules | |
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| Digital SOP | |
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| RF SOP | |
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| Optoelectronic SOP | |
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| MEMS SOP | |
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| Fundamental Heat Transfer Modes | |
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| Conduction | |
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| Convection | |
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| Radiation | |
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| Fundamentals of Thermal Characterization | |
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| Numerical Methods for Thermal Characterization | |
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| Experimental Methods for Thermal Characterization | |
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| Thermal Management Technologies | |
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| Thermal Design Methodologies | |
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| Power Minimization Methodologies | |
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| Parallel Processing | |
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| Dynamic Voltage and Frequency Scaling (DVFS) | |
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| Application-Specific Processors (ASP) | |
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| Cache Power Minimization | |
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| Power Harnessing | |
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| Summary | |
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| Acknowledgments | |
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| References | |
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| Electrical Test of SOP Modules and Systems | |
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| SOP Electrical Test Challenges | |
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| Objectives of the HVM Test Process and Challenges for SOPs | |
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| HVM Test Flow for SOPs | |
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| Known Good Embedded Substrate Test | |
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| Substrate Interconnect Tests | |
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| Testing Embedded Passives | |
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| Known Good Embedded Module Test of Digital Subsystems | |
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| Boundary Scan-IEEE 1149.1 | |
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| Multi-gigahertz Digital Test: Recent Developments | |
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| KGEM Test of Mixed-Signal and RF Subsystems | |
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| Test Strategies | |
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| Fault Models and Test Quality | |
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| Direct Measurement of Specifications Using Dedicated Circuitry | |
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| Alternate Testing Methods for Mixed-Signal and RF Circuits | |
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| Summary | |
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| Acknowledgments | |
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| References | |
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| Biosensor SOP | |
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| Introduction to Biosensor SOP | |
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| SOP: A Highly Miniaturized Electronic System Technology | |
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| Biosensor SOP for Miniaturized Biomedical Implants and Sensor Systems | |
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| Building Blocks of Biosensor SOP | |
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| Biosensing | |
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| Microchannels for Biofluid Transport | |
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| Biosensing Element (Probe) Design and Preparation | |
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| Probe-Target Molecular Hybridization | |
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| Signal Conversion | |
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| Nanomaterials and Nanostructures for Signal Conversion Components | |
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| Surface Modification and Biofunctionalization of Signal Conversion Component | |
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| Signal Conversion Methods | |
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| Signal Detection and Electronic Processing | |
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| Low-Power Application-Specific Integrated Circuits (ASICs) and Mixed-Signal Design for Biosensor SOP | |
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| Bio- SOP Substrate Integration Technologies | |
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| Summary and Future Trends | |
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| Nano Bio-SOP Integration Challenges | |
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| References | |
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| Index | |