Digital Systems Design Using VHDL

Name: Digital Systems Design Using VHDL
Price: 54.06 USD
Availability: InStock
ISBN: 9780534384623

ISBN-10: 0534384625

ISBN-13: 9780534384623

Edition: 2nd 2008

Authors: Jr. Roth, Lizy K. John, Charles H. Roth

List price: $201.95

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Written for an advanced-level course in digital systems design, DIGITAL SYSTEMS DESIGN USING VHDL integrates the use of the industry-standard hardware description language VHDL into the digital design process. Following a review of basic concepts of logic design, the author introduces the basics of VHDL, and then incorporates more coverage of advanced VHDL topics. Rather than simply teach VHDL as a programming language, this book emphasizes the practical use of VHDL in the digital design process.

Book details

List price: $201.95
Edition: 2nd
Copyright year: 2008
Publisher: Course Technology
Publication date: 3/30/2007
Binding: Hardcover
Pages: 580
Size: 8.50" wide x 9.75" long x 1.00" tall
Weight: 2.530
Language: English

Charles Roth is Professor Emeritus in Electrical and Computer Engineering at the University of Texas at Austin, where he taught Digital Design for more than four decades. He is the author of Fundamentals of Logic Design, which is in its sixth edition, and Digital Systems Design using VHDL, which is in its second edition.

Lizy John is B. N. Gafford Professor in Electrical and Computer Engineering at The University of Texas at Austin. She has been teaching digital design and computer architecture for almost two decades. The coauthor of DIGITAL SYSTEMS DESIGN USING VHDL (in its 2nd edition), she has edited books on computer performance evaluation and workload characterization. She is an IEEE Fellow.



Preface



Review Of Logic Design Fundamentals


Combinational Logic


Boolean Algebra and Algebraic Simplification


Karnaugh Maps


Designing with NAND and NOR Gates


Hazards in Combinational Networks


Flip-flops and Latches


Meanly Sequential Network Design


Design of a Moore Sequential Network


Equivalent States and Reduction of State Tables


Sequential Network Timing


Setup and Hold Times


Synchronous Design


Tristate Logic and Busses



Introduction To Vhdl Vhdl


Description of Combinational Networks


Modeling Flip-flops using VHDL Processes


VHDL Models for a Multiplexer


Compilation and Simulation of VHDL Code


Modeling a Sequential Machine


Variables, Signals, and Constants


Arrays


VHDL Operators


VHDL Functions


VHDL Procedures


Packages and Libraries


VHDL Model for a 74163 Counter



Designing With Programmable Logic Devices


Read-only Memories


Programmable Logic Arrays (PLAs)


Programmable Array Logic (PALs)


Other Sequential Programmable Logic Devices (PLDs)


Design of a Keypad Scanner



Design Of Networks For Arithmetic Operations


Design of a Serial Adder with Accumulator


State Graphs for Control Networks


Design of a Binary Multiplier


Multiplication of Signed Binary Numbers


Design of a Binary Divider



Digital Design With Sm Charts


State Machine Charts


Derivation of SM Charts


Realization of SM Charts


Implementation of the Dice Game


Alternative Realizations for SM Charts Using Microprogramming


Linked State Machines



Designing with programmable gate arrays and complex programmable logic devices XILINX 3000 Series FPGAs


Designing with FPGAs


XILINX 4000 Series FPGAs


Using a One-Hot State Assignment


Altera Complex Programmable Logic Devices (CPLDs)


Altera FLEX 10K Series CPLDs



Floating-Point Arithmetic


Representation of Floating-Point Numbers


Floating-Point Multiplication


Other Floating-Point Operations



Additional Topics In VHDL Attributes


Transport and Inertial Delays


Operator Overloading


Multivalued Logic and Signal Resolution


IEEE-1164 Standard Logic


Generics


Generate Statements


Synthesis of VHDL Code


Synthesis Examples


Files and TEXTIO



VHDL Models For Memories And Busses


Static RAM Memory


A Simplified 486 Bus Model


Interfacing Memory to a Microprocessor Bus



Hardware Testing And Design For Testability


Testing Combinational Logic


Testing Sequential Logic


Scan Testing


Boundary Scan


Built-In Self-Test



Design Examples Uart


Design


Description of the MC68HC05 Microcontroller


Design of Microcontroller CPU


Completion of the Microcontroller Design



Vhdl Language Summary



Bit Package



Textio Package



Behavioral Vhdl Code For M6805 CPU



M6805 CPU Vhdl Code For Synthesis



Projects


References


Index