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Computer Architecture A Quantitative Approach

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ISBN-10: 012383872X

ISBN-13: 9780123838728

Edition: 5th 2012

Authors: John L. Hennessy, David A. Patterson

List price: $89.95
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Book details

List price: $89.95
Edition: 5th
Copyright year: 2012
Publisher: Elsevier Science & Technology
Publication date: 10/25/2011
Binding: Paperback
Pages: 856
Size: 7.50" wide x 9.21" long x 1.75" tall
Weight: 3.894

John L. Hennessy is the president of Stanford University, where he has been a member of the faculty since 1977 in the departments of electrical engineering and computer science. Hennessy is a fellow of the IEEE and the ACM, a member of the National Academy of Engineering, the National Academy of Science, the American Academy of Arts and Sciences, and the Spanish Royal Academy of Engineering. He received the 2001 Eckert-Mauchly Award for his contributions to RISC technology, the 2001 Seymour Cray Computer Engineering Award, and shared the John von Neumann award in 2000 with David Patterson. After completing the project in 1984, he took a one-year leave from the university to co-found MIPS…    

David A. Patterson was the first in his family to graduate from college (1969 A.B UCLA), and he enjoyed it so much that he didn't stop until a PhD, (1976 UCLA). After 4 years developing a wafer-scale computer at Hughes Aircraft, he joined U.C. Berkeley in 1977. He spent 1979 at DEC working on the VAX minicomputer. He and colleagues later developed the Reduced Instruction Set Computer (RISC). By joining forces with IBM's 801 and Stanford's MIPS projects, RISC became widespread. In 1984 Sun Microsystems recruited him to start the SPARC architecture. In 1987, Patterson and colleagues wondered if tried building dependable storage systems from the new PC disks. This led to the popular Redundant…    

Printed Text
Fundamentals of Quantitative Design and Analysis
Memory Hierarchy Design
Instruction-Level Parallelism and Its Exploitation
Data-Level Parallelism in Vector, SIMD, and GPU Architectures
Multiprocessors and Thread-Level Parallelism
The Warehouse-Scale Computer
App A Instruction Set Principles
App B Review of Memory Hierarchy
App C Pipelining: Basic and Intermediate Concepts
Online
App D Storage Systems
App E Embedded Systems
App F Interconnection Networks
App G Vector Processors
App H Hardware and Software for VLIW and EPIC
App I Large-Scale Multiprocessors and Scientific Applications
App J Computer Arithmetic
App K Survey of Instruction Set Architectures
App L Historical Perspectives