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Designing Microprocessors | |
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Overview of a Microprocessor | |
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Design Abstraction Levels | |
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Examples of a 2-to-1 Multiplexer | |
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Introduction to VHDL | |
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Synthesis | |
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Going Forward | |
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Summary Checklist | |
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Problems | |
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Digital Circuits | |
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Binary Numbers | |
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Binary Switch | |
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Basic Logic Operators and Logic Expressions | |
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Truth Tables | |
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Boolean Algebra and Boolean Function | |
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Minterms and Maxterms | |
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Canonical, Standard, and non-Standard Forms | |
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Logic Gates and Circuit Diagrams | |
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Example: Designing a Car Security System | |
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VHDL for Digital Circuits | |
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Summary Checklist | |
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Problems | |
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Combinational Circuits | |
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Analysis of Combinational Circuits | |
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Synthesis of Combinational Circuits | |
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Technology Mapping | |
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Minimization of Combinational Circuits | |
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Timing Hazards and Glitches | |
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7-Segment Decoder Example | |
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VHDL for Combinational Circuits | |
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Summary Checklist | |
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Problems | |
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Standard Combinational Components | |
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Signal Naming Conventions | |
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Adder | |
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Two?s Complement Binary Numbers | |
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Subtractor | |
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Adder-Subtractor Combination | |
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Arithmetic Logic Unit | |
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Decoder | |
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Encoder | |
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Multiplexer | |
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Tri-state Buffer | |
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Comparator | |
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Shifter-Rotator | |
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Multiplier | |
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Summary Checklist | |
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Problems | |
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Implementation Technologies | |
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Physical Abstraction | |
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Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET) | |
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CMOS Logic | |
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CMOS Circuits | |
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Analysis of CMOS Circuits | |
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Using ROMs to Implement a Function | |
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Using PLAs to Implement a Function | |
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Using PALs to Implement a Function | |
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Complex Programmable Logic Device (CPLD) | |
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Field-Programmable Gate Array (FPGA) | |
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Summary Checklist | |
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Problems | |
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Latches and Flip-Flops | |
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Bistable Element | |
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SR Latch | |
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SR Latch with Enable | |
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D Latch | |
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D Latch with Enable | |
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Clock | |
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D Flip-Flop | |
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D Flip-Flop with Enable | |
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Asynchronous Inputs | |
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Description of a Flip-Flop | |
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Timing Issues | |
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Example: Car Security System ? Version 2 | |
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VHDL for Latches and Flip-Flops | |
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Flip-Flop Types | |
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Summary Checklist | |
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Problems | |
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Sequential Circuits | |
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Finite-State-Machine (FSM) Model | |
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State Diagrams | |
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Analysis of Sequential Circuits | |
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Synthesis of Sequential Circuits | |
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Unused State Encodings and the Encoding of States | |
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Example: Car Security System ? Version 3 | |
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VHDL for Sequential Circuits | |
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Optimization for Sequential Circuits | |
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Summary Checklist | |
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Problems | |
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Standard Sequential Components | |
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Registers | |
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Shift Registers | |
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Counters | |
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Register Files | |
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Static Random Access Memory | |
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Larger Memories | |
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More Memory Locations | |
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Summary Checklist | |
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Problems | |
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Datapaths | |
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General Datapath | |
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Using a General Datapath | |
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Timing Issues | |
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A More Complex General Datapath | |
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Dedicated Datapath | |
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Designing Dedicated Datapaths | |
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Using a Dedicated Datapath | |
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VHDL for Datapaths | |
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Summary Checklist | |
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Problems | |
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Control Units | |
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Constructing the Control Unit | |
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Examples | |
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Generating Status Signals | |
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Timing Issues | |
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Standalone Controllers | |
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ASM Charts and State Action Tables | |
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VHDL for Control Units | |
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Summary Checklist | |
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Problems | |
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Dedicated Microprocessors | |
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Manual Construction of a Dedicated Microprocessor | |
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Examples | |
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VHDL for Dedicated Microprocessors | |
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Summary Checklist | |
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Problems | |
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General-Purpose Microprocessors | |
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Overview of the CPU Design | |
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The EC | |