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| Preface | |
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| Power Device Evolution and the Advent of IGBT | |
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| Introductory Background | |
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| Insulated Gate Bipolar Transistor | |
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| Advantages and Shortcomings of IGBT | |
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| IGBT Structure and Fabrication | |
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| Equivalent Circuit Representations | |
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| Principle of Operation and Charge-Control Phenomena | |
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| Circuit Modeling | |
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| Packaging Options for IGBTs | |
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| Handling Precautions of IGBTs | |
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| IGBT Gate Driving Circuits | |
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| IGBT Protection | |
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| Summary and Trends | |
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| Review Exercises | |
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| References | |
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| IGBT Fundamentals and Status Review | |
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| Device Structures | |
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| Device Operational Modes | |
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| Static Characteristics of IGBT | |
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| Switching Behavior of IGBT | |
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| Safe Operating Area (SOA) | |
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| High-Temperature Operation | |
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| Radiation Effects | |
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| Trench-Gate IGBT and Injection-Enhanced IGBT (IEGT) | |
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| Self-Clamped IGBT | |
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| Ratings and Applications of IGBT | |
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| Summary and Trends | |
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| Review Exercises | |
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| References | |
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| MOS Components of IGBT | |
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| General Considerations | |
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| MOS Structure Analysis and Threshold Voltage | |
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| Current-Voltage Characteristics of MOSFET; Transconductance and Drain Resistance | |
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| ON-Resistance Model of DMOSFET and UMOSFET | |
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| MOSFET Equivalent Circuit and Switching Times | |
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| Safe Operating Area (SOA) | |
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| Neutron and Gamma-Ray Damage Effects | |
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| Thermal Behavior of MOSFET | |
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| DMOSFET Cell Windows and Topological Designs | |
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| Summary and Trends | |
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| Review Exercises | |
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| References | |
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| Derivation of Eqs. (3.2a) and (3.2b) | |
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| Derivation of Eq. (3.7) | |
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| Derivation of the Equations for Bulk Semiconductor Potential [psi subscript B] and the Surface Charge Q[subscript s] at the Point of Transition into Strong Inversion | |
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| Derivation of Eqs. (3.33)-(3.36) | |
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| Derivation of Eq. (3.39) | |
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| Derivation of Eq. (3.49) | |
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| Bipolar Components of IGBT | |
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| PN Junction Diode | |
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| P-I-N Rectifier | |
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| Bipolar Junction Transistor | |
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| Thyristor | |
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| Junction Field-Effect Transistor (JFET) | |
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| Summarizing Remarks | |
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| Review Exercises | |
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| References | |
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| Drift and Diffusion Current Densities | |
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| Einstein's Equation | |
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| Continuity Equation and Its Solution | |
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| Solution of the Continuity Equation (4.41) | |
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| Derivation of Eq. (4.50) | |
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| Derivation of Current Density Equations (4.55) and (4.56) | |
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| Transistor Terminal Currents [Eqs. (4.57) and (4.58)] | |
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| Common-Base Current Gain [alpha subscript T] [Eq. (4.63)] | |
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| Physics and Modeling of IGBT | |
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| PIN Rectifier-DMOSFET Model of IGBT | |
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| Bipolar Transistor-DMOSFET Model of IGBT by Extension of PIN Rectifier-DMOSFET Model | |
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| Bipolar Transistor-DMOSFET Model of IGBT with Device-Circuit Interactions | |
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| Concluding Comments | |
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| Review Exercises | |
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| References | |
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| Solution of Eq. (5.8) | |
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| Derivation of Eqs. (5.33) and (5.34) | |
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| Derivation of Eq. (5.35) | |
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| Derivation of Eq. (5.38) [Solution of Eq. (5.35)] | |
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| Derivation of Eqs. (5.40)-(5.42) | |
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| Derivation of Eq. (5.44) | |
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| Derivation of Eqs. (5.81) and Construction of Equivalent Conductive Network for 1-D Linear Element | |
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| Latchup of Parasitic Thyristor in IGBT | |
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| Introduction | |
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| Static Latching | |
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| Dynamic Latching | |
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| Latching Prevention Measures | |
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| Latching Current Density of Trench-Gate IGBT | |
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| Summarizing Remarks | |
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| Review Exercises | |
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| References | |
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| Equation (6.15) | |
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| Equation (6.20) | |
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| Design Considerations of IGBT Unit Cell | |
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| Semiconductor Selection and Vertical Structure Design | |
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| IGBT Design by Analytical Calculations and Numerical Simulations | |
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| Optimization of N-Buffer Layer Structure | |
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| Field Ring and Field Plate Termination Design | |
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| Surface Ion-Implanted Edge Termination | |
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| Reduced Surface Electric Field (Resurf) Concept for Breakdown Voltage Enhancement in Lateral IGBT | |
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| Concluding Comments | |
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| Review Exercises | |
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| References | |
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| Multiplication Coefficient M | |
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| V[subscript BR] Equation | |
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| Avalanche Breakdown Voltage (V[subscript B]) | |
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| Punchthrough Voltage (V[subscript PT]) | |
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| BV[subscript CYL]/BV[subscript PP] Equation | |
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| IGBT Process Design and Fabrication Technology | |
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| Process Sequence Definition | |
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| Unit Process Steps | |
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| Process Integration and Simulation | |
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| Review Exercises | |
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| References | |
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| Thermal Oxidation of Silicon | |
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| Derivation of Eqs. (8.3)-(8.5) | |
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| Power IGBT Modules | |
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| Paralleling IGBTs, and Integration of Logic Circuits with Power Components | |
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| Power Module Technologies | |
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| Isolation Techniques | |
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| Integrable Devices: Bipolar, CMOS, DMOS (BCD), and IGBT | |
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| Power IGBT Driving, Temperature Sensing, and Protection | |
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| Parasitic Components of IGBT Module Package | |
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| Flat-Packaged IGBT Modules | |
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| Desirable Features and Reliability of IGBT Modules | |
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| Module Heat Sinks and Cooling | |
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| Material Requirements for High-Power IGBT Modules | |
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| State-of-the-Art and Trends | |
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| Review Exercises | |
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| References | |
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| Novel IGBT Design Concepts, Structural Innovations, and Emerging Technologies | |
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| Trade-Off Between ON-State Voltage Drop and Switching Losses | |
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| Parallel and Coupled PIN Diode-PNP Transistor Model of Carrier Distribution in the ON State of Trench IGBT | |
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| Non-Self-Aligned Trench IGBT for Superior ON-State Performance | |
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| Dynamic N-Buffer Insulated Gate Bipolar Transistor (DB-IGBT) | |
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| Lateral IGBT with Reverse Blocking Capability | |
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| Lateral IGBT with High-Temperature Latchup Immunity | |
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| Self-Aligned Sidewall-Implanted N[superscript +]-Emitter Lateral IGBT (Si-LIGBT) with High Latchup Current Capability | |
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| Improved LIGBT Structure for Larger FBSOA | |
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| Lateral IGBT with Integrated Current Sensor | |
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| Dielectrically Isolated Fast LIGBTs | |
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| Lateral IGBT in Thin Silicon-on-Insulator (SOI) Substrate | |
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| Lateral Trench-Gate Bipolar Transistor (LTGBT) for Improved Latchup Characteristics | |
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| Trench Planar Insulated Gate Bipolar Transistor (TPIGBT) | |
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| Clustered Insulated Gate Bipolar Transistor in Homogeneous Base Technology (HB-CIGBT) | |
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| Trench Clustered Insulated Gate Bipolar Transistor (TCIGBT) | |
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| Double-Gate Injection-Enhanced Gate Transistor (DG-IEGT) | |
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| SiC IGBTs | |
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| Summary and Trends | |
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| Review Exercises | |
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| References | |
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| Electron Current at the Collector Junction | |
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| Transient Base Stored Charge Q[subscript base](t) | |
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| Depletion Width in the Presence of Mobile Carrier Concentration | |
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| Modulated Base Resistance (R[subscript b]) | |
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| ON-State Voltage Drop Due to Recombination in the End Regions of the PIN Diode in the IGBT | |
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| Energy Loss | |
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| Excess Carrier Concentration P[subscript w] in the N[superscript -] Base of TIGBT at the Emitter End | |
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| ON-State Voltage Drop Across the N[superscript -] Base of IGBT | |
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| IGBT Circuit Applications | |
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| DC-to-DC Conversion | |
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| DC-to-AC Inversion | |
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| AC-to-DC Conversion | |
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| Soft-Switching Converters | |
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| IGBT Circuit Simulation | |
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| Applications of IGBT Converters | |
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| Summarizing Remarks | |
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| Review Exercises | |
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| References | |
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| Index | |
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| About the Author | |