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Advanced Research in VLSI and Parallel Systems Proceedings of the 1992 Brown/MIT Conference, 1992

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ISBN-10: 0262111667

ISBN-13: 9780262111669

Edition: 1992

Authors: Thomas Knight, John Savage

List price: $65.00
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Description:

The design of highly integrated or large-scale systems involves a set of interrelated disciplines, including circuits and devices, design automation, VLSI architecture, software systems, and theory. Successful research in any of these disciplines increasingly relies on an understanding of the other areas. This conference the 14th in a series that has been held at Caltech, MIT, UNC Chapel Hill, Stanford, and UC Santa Cruz, seeks to encourage interaction among researchers in all disciplines; that relate to highly integrated systems. Thomas Knight is Associate Professor in the Department of Electrical Engineering and Computer Science at the Massachusetts Institute of Technology. John Savage…    
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Book details

List price: $65.00
Copyright year: 1992
Publisher: MIT Press
Publication date: 3/20/1992
Binding: Hardcover
Pages: 380
Size: 6.50" wide x 9.50" long x 1.00" tall
Weight: 1.584
Language: English

Preface
Program Committee
Keyote Address: Balancing the New Supercomputing Equationp. 1
Architecture
Design and Implementation of the Message-Driven Processorp. 5
TRIPTYCH: An FPGA Architecture with Integrated Logic and Routingp. 26
Reducing Multi-Processor Memory Contention with Orthogonal Redundant Memoryp. 44
Fast Permuting on Disk Arrays (Extended Abstract)p. 58
Computer Aided Design
Compiling Joy to Siliconp. 79
Optimal Joining of Compacted Cellsp. 99
A New Method to Compute Prime and Essential Prime Implicants of Boolean Functionsp. 113
Equation-Free Synthesis of High-Performance Linear Analog Circuitsp. 129
Circuit Technology
A CMOS Parallel Adder Using Wave Pipeliningp. 147
Using Qualified Clocks in the NORA Clocking Methodology to Implement a Systolic Queue Designp. 165
A Fast Static CMOS NOR Gatep. 180
Verification and Fault Tolerance
Compositional Verification of Systems with Synchronous Globally Timed Controlp. 195
Functional Partitioning for Verification and Related Problemsp. 210
Fault Tolerance and Performance of Multipath Multistage Interconnection Networksp. 227
Timing
Optimizing Two-Phase, Level-Clocked Circuitry (Extended Abstract)p. 245
Optimal Retiming of Multi-Phase, Level-Clocked Circuitsp. 265
Event Suppression: Improving the Efficiency of Timing Simulation for Synchronous Digital Circuitsp. 281
Network Communication
Match and Move, an Approach to Data Parallel Computingp. 299
Scattering and Gathering Messages in Networks of Processorsp. 318
Mesh and Torus Chaotic Routingp. 333
Efficient Routing of a Class of Permutations in VLSIp. 348
Author Indexp. 367
Table of Contents provided by Blackwell. All Rights Reserved.