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Preface | |
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List of Figures | |
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The Computer | |
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Introduction | |
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Calculators | |
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Stack Calculators | |
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The Use of Registers | |
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Programmable Calculators | |
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Machine Language Programming | |
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m4: The Macro Processor | |
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Macros with Arguments | |
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Memory Location | |
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Conditionals and Branching | |
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The von Neumann Machine | |
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The Stack Machine | |
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The Java Virtual Machine | |
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Accumulator Machines | |
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Load/Store Machines | |
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Assemblers | |
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Summary | |
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Exercises | |
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Sparc Architecture | |
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Introduction | |
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Registers | |
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SPARC Assembly Language Programming | |
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An Example | |
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Pipelining | |
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The Example Continued | |
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The Debugger gdb | |
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Filling Delay Slots | |
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Branching | |
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Testing | |
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Branches | |
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Control Statements | |
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While | |
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Do | |
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For | |
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If Then | |
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If Else | |
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Annulled Unconditional Branch | |
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Summary | |
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Exercises | |
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Digital Logic and Binary Numbers | |
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Binary Hardware Devices | |
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Decimal and Binary Number Systems | |
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Octal and Hexadecimal Numbers | |
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Converting from Decimal to Binary | |
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Converting from Binary to Decimal | |
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ASCII Representation of Characters | |
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Bitwise Logical Operations | |
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Synthetic Instructions Using %g0 | |
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Flags | |
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Summary | |
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Exercises | |
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Binary Arithmetic | |
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Introduction | |
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Binary Numbers and Addition | |
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Half and Full Adders | |
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Modulus Arithmetic | |
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Subtraction | |
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Two's Complement Number Branching Conditions | |
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Shifting | |
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Unsigned Arithmetic | |
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Unsigned Number Branching Conditions | |
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Condition Code Tests | |
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Multiplication | |
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SPARC mulscc Instruction | |
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Division | |
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Extended Precision Arithmetic | |
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Addition of Extended Precision Numbers | |
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Subtraction of Extended Precision Numbers | |
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Multiplication of Extended Precision Numbers | |
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Summary | |
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Exercises | |
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The Stack | |
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Memory | |
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The Stack | |
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The Frame Pointer | |
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Addressing Stack Variables | |
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Load Instructions | |
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Store Instructions | |
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Defining Stack Variable Offsets | |
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An Example | |
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One-Dimensional Arrays | |
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Improvements to the Code | |
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Summary | |
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Exercises | |
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Data Structures | |
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Introduction | |
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Array Storage and Addressing | |
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Multidimensional Arrays | |
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Lower Bounds Different from Zero | |
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Array Bound Checking | |
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Address Arithmetic | |
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Structures | |
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Structures as Automatic Variables | |
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Nested Structures | |
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Summary | |
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Exercises | |
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Subroutines | |
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Introduction | |
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Open Subroutines | |
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Register Saving | |
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Subroutine Linkage | |
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Arguments to Subroutines | |
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Examples | |
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Return Values | |
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Subroutines with Many Arguments | |
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Leaf Subroutines | |
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Pointers as Arguments to Subroutines | |
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Summary | |
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Exercises | |
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Machine Instructions | |
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Introduction | |
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Instruction Decode | |
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Format Three Instructions | |
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Format One Instruction: The call Instruction | |
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Format Two Instructions | |
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Branch Instructions | |
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Loading 32-Bit Constants | |
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Summary | |
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Exercises | |
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External Data and Text | |
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Introduction | |
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External Variables | |
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The text Section | |
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The data Section | |
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ASCII Data | |
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Pointers | |
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The .bss Section | |
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The switch Statement | |
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Relocation and Linking with Other Code | |
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Makefiles | |
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C Command Line Arguments | |
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Summary | |
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Exercises | |
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Input/Output | |
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Introduction | |
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Memory Mapped I/O | |
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Character Devices | |
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Programmed I/O | |
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Interrupt-Driven I/O | |
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Block Devices | |
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Directory Devices | |
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Input/Output Processors | |
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System I/O | |
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Summary | |
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Exercises | |
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Floating-Point | |
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Introduction | |
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Fixed Binary Point Numbers | |
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Scientific Notation | |
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Floating-Point | |
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The Floating-Point Processor | |
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A Floating-Point Program | |
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Debugging Single Presision Floating-Point Code | |
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An Improved Version of the Code | |
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Floating NaNs | |
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Subnormal Numbers | |
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Extended Precision Floating-Point | |
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Debugging Floating Double Programs | |
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Floating Quad Format | |
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Function Calls | |
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Tagged Arithmetic | |
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Lisp | |
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Tagged Arithmetic Instructions | |
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Summary | |
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Exercises | |
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Traps and Exceptions | |
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Introduction | |
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Processor State Registers | |
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Processor State Register | |
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Window Invalid Mask Register | |
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Trap Base Register | |
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Floating-Point Processor State Register | |
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Traps | |
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Window Traps | |
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Summary | |
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Memory Management | |
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Introduction | |
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Virtual Memory and Paging | |
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Page Descriptor Cache | |
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Cache Memory | |
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Context Switching | |
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Summary | |
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Other Architectures | |
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Introduction | |
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The PDP-11 | |
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The VAX-11 | |
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The MIPS Architecture | |
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Summary | |
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Exercises | |
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Ultra Sparc | |
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Introduction | |
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64-Bit Virtual Memory Addresses | |
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Superscalar Execution | |
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Branch Prediction | |
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Branch on Integer Register | |
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Multiple Floating-Point Condition Codes | |
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Move Register on Condition | |
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Instruction and Data Prefetching | |
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Nonfaulting Loads | |
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Changes to Supervisor Mode | |
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Summary | |
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Macro Definitions | |
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Register Name Macro Definitions | |
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Multiplication by Constants | |
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Introduction | |
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m4 Built-in Macros | |
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Conversion to Binary | |
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Conversion to a Base 31 Number | |
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Instruction Generation | |
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User Mode Machine Instructions | |
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Syntax | |
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Arithmetic Instructions | |
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Logical Instructions | |
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Shift Instructions | |
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Load Instructions | |
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Store Instructions | |
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Integer Branch Instructions | |
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Trap Instructions | |
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Control Instructions | |
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Floating-Point Instructions | |
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Floating-Point Branch Instructions | |
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Synthetic Instructions and Pseudo-Ops | |
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Instructions Sorted Alphabetically | |
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Powers of 2 | |
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Macro Language Processor m4 | |
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Bibliography | |
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Index | |