Electronic Design Automation Synthesis, Verification, and Test

ISBN-10: 0123743648

ISBN-13: 9780123743640

Edition: 2008

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Description:

This book provides broad and comprehensive coverage of the entire EDA flow. EDA/VLSI practitioners and researchers in need of fluency in an "adjacent" field will find this an invaluable reference to the basic EDA concepts, principles, data structures, algorithms, and architectures for the design, verification, and test of VLSI circuits. Anyone who needs to learn the concepts, principles, data structures, algorithms, and architectures of the EDA flow will benefit from this book. * Covers complete spectrum of the EDA flow, from ESL design modeling to logic/test synthesis, verification, physical design, and test...helps EDA newcomers to get "up-and-running" quickly; * Comprehensive coverage of EDA concepts, principles, data structures, algorithms, and architectures...helps all readers improve their VLSI design competence; * Latest advancements, not yet available in other books, including Test compression, ESL design modeling, Large-scale floorplanning, Placement, Routing, Synthesis of clock and power/ground networks...helps readers to design/develop testable chips or products; * Includes industry best-practices wherever appropriate in most chapters...helps readers avoid costly mistakes.
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Book details

List price: $110.00
Copyright year: 2008
Publisher: Elsevier Science & Technology Books
Publication date: 2/26/2009
Binding: Hardcover
Pages: 972
Size: 7.00" wide x 11.00" long x 0.75" tall
Weight: 3.982
Language: English

Laung-Terng Wang, Ph.D., is founder, chairman, and chief executive officer of SynTest Technologies, CA. He received his EE Ph.D. degree from Stanford University. A Fellow of the IEEE, he holds 18 U.S. Patents and 12 European Patents, and has co-authored/co-edited two internationally used DFT textbooks- VLSI Test Principles and Architectures (2006) and System-on-Chip Test Architectures (2007).

Kwang-Ting (Tim) Cheng, Ph.D., is a Professor and Chair of the Electrical and Computer Engineering Department at the University of California, Berkeley. A Fellow of the IEEE, he has published over 300 technical papers, co-authored three books, and holds 11 U.S. Patents.

Yao-Wen Chang, Ph.D., is a Professor in the Department of Electrical Engineering, National Taiwan University. He recevied his Ph.D. degree in Computer Science from the University of Texas at Austin. He has published over 200 technical papers, co-authored one book, and is a winner of the ACM ISPD Placement (2006) and Global Routing (2008) contests.

Introduction
Fundamentals of CMOS Design
Design for Testability
Fundamentals of Algorithms
Electronic System-Level Design and Modeling
High-Level Synthesis
Logic Synthesis
Test Synthesis
Logic and Circuit Simulation
Functional Verification
Floorplanning
Placement
Global and Detailed Routing
Synthesis of Clock and Power/Ground Networks
Fault Simulation and Test Generation
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