HDL Programming Fundamentals VHDL and Verilog

Name: HDL Programming Fundamentals VHDL and Verilog
Price: 41.98 USD
Availability: InStock
ISBN: 9781584508557

ISBN-10: 1584508558

ISBN-13: 9781584508557

Edition: 2006

Authors: Nazeih M. Botros

List price: $59.95

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Advances in semiconductor technology continue to increase the power and complexity of digital systems. To design such systems requires a strong knowledge of Application Specific Integrated Circuits (ASICs) and Field Programmable Gate Arrays (FPGAs), as well as the CAD tools required. Hardware Description Language (HDL) is an essential CAD tool that offers designers an efficient way for implementing and synthesizing the design on a chip. HDL Programming Fundamentals: VHDL and Verilog teaches students the essentials of HDL and the functionality of the digital components of a system. Unlike other texts, this book covers both IEEE standardized HDL languages: VHDL and Verilog. Both of these…

Book details

List price: $59.95
Copyright year: 2006
Publisher: Charles River Media
Publication date: 11/18/2005
Binding: Hardcover
Pages: 506
Size: 7.50" wide x 9.50" long x 1.50" tall
Weight: 2.486
Language: English



Preface



Introduction



Why HDL?



A Brief History of HDL



Structure of the HDL Module



Operators



Data Types



Styles (Types) of Descriptions



Simulation and Synthesis



Brief Comparison of VHDL and Verilog



Summary



Exercises



References



Data-Flow Descriptions



Highlights of Data-Flow Description



Structure of the Data-Flow Description



Data Type?Vectors



Common Programming Errors



Summary



Exercises



References



Behavioral Descriptions



Behavioral Description Highlights



Structure of the HDL Behavioral Description



The VHDL Variable-Assignment Statement



Sequential Statements



Common Programming Errors



Summary



Exercises



References



Structural Descriptions



Highlights of Structural Descriptions



Organization of the Structural Description



Binding



State Machines



Generate (HDL), Generic (VHDL), and Parameter (Verilog)



Summary



Exercises



References



Switch-Level Descriptions



Highlights of the Switch-Level Description



Useful Definitions



Single NMOS and PMOS Switches



Switch-Level Description of Primitive Gates



Switch-Level Description of Simple Combinational Logics



Switch-Level Description of Simple Sequential Circuits



Bidirectional Switches



Summary



Exercises



References



Procedures, Tasks, and Functions



Highlights of Procedures, Tasks, and Functions



Procedures and Tasks



Functions



Summary



Exercises



References



Mixed-Type Descriptions



Why Mixed-Type Description?



VHDL User-Defined Types



VHDL Packages



Mixed-Type Description Examples



Summary



Exercises



References



Advanced HDL Descriptions



File Processing



Examples of File Processing



VHDL Record Type



Summary



Exercises



References



Mixed-Language Descriptions



Highlights of Mixed-Language Description



How to Invoke One Language from the Other



Mixed-Language Description Examples



Limitations of Mixed-Language Description



Summary



Exercises



References



Synthesis Basics



Highlights of Synthesis



Synthesis Information from Entity and Module



Mapping Process and Always in the Hardware Domain



Summary



Exercises



References



Creating a Project in Xilinx 7.1“ Using VHDL or Verilog



Summary of HDL Commands



About the CD-ROM


Index