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Cache Coherence Problem in Shared-Memory Multiprocessors Software Solutions

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ISBN-10: 0818670967

ISBN-13: 9780818670961

Edition: 1996

Authors: Igor Tartalja, Veljko Milutinović

List price: $93.95
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Description:

Almost all software solutions are developed through academic research and implemented only in prototype machines leaving the field of software techniques for maintaining the cache coherence widely open for future research and development. This book is a collection of all the representative approaches to software coherence maintenance including a number of related efforts in the performance evaluation field. The book presents a selection of 27 papers dealing with state-of-the-art software solutions for cache coherence maintenance in shared-memory multiprocessors. It begins with a set of four introductory readings that provides a brief overview of the cache coherence problem and introduces…    
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Book details

List price: $93.95
Copyright year: 1996
Publisher: John Wiley & Sons, Incorporated
Publication date: 2/13/1996
Binding: Paperback
Pages: 358
Size: 8.15" wide x 11.00" long x 0.80" tall
Weight: 1.848
Language: English

Eu era algu�m at� ontem. Desde o nascimento fui diversas pessoas, personagens, criaturas. Fato � que n�o quero ser coisa alguma. Estou sendo.Sou escritor, astr�logo, ateu, ariano, carioca, brasileiro, pai, filho, neto, fot�grafo, poeta, fil�sofo, analista de Marketing digital e nada disso ao mesmo tempo. Sou uma reinven��o de mim mesmo, um travesti p�s-moderno.

Preface
Introduction
Introductory Readings
How to Make a Multiprocessor Computer that Correctly Executes Multiprocess Programs (IEEE Transactions on Computers, September 1979)
Synchronization, Coherence, and Event Ordering in Multiprocessors (Computer, February 1988)
Cache Coherence in Large-Scale Shared-Memory Multiprocessors: Issues and Comparisons (ACM Computing Surveys, September 1993)
Software Cache Consistency in Shared-Memory Multiprocessors: A Survey of Approaches and Performance Evaluation Studies
Static Software Cache Coherence Schemes
Compiler-Directed Cache Management in Multiprocessors (Computer, June 1990)
RP3 Processor-Memory Element (Proceedings of the 1985 International Conference on Parallel Processing, 1985)
A Compiler-Assisted Cache Coherence Solution for Multiprocessors (Proceedings of the 1986 International Conference on Parallel Processing, 1986)
A Cache Coherence Scheme With Fast Selective Invalidation (Proceedings of the 15th Annual International Symposium on Computer Architecture, 1988)
Automatic Management of Programmable Caches (Proceedings of the 1988 International Conference on Parallel Processing, 1988)
A Version Control Approach to Cache Coherence (Proceedings of the International Conference on Supercomputing '89, 1989)
Design and Analysis of a Scalable Cache Coherence Scheme Based on Clocks and Timestamps (IEEE Transactions on Parallel and Distributed Systems, January 1992)
A Generational Algorithm to Multiprocessor Cache Coherence (Proceedings of the 1993 International Conference on Parallel Processing, Volume I, 1993)
Cache Coherence Using Local Knowledge (Proceedings of Supercomputing '93, 1993)
Dynamic Software Cache Coherence Schemes
Software-Controlled Caches in the VMP Multiprocessor (Proceedings of the 13th Annual International Symposium on Computer Architecture, 1986)
CPU Cache Consistency with Software Support and Using "One Time Identifiers" (Proceedings of the Pacific Computer Communication Symposium, 1985)
An Approach to Dynamic Software Cache Consistency Maintenance Based on Conditional Invalidation (Proceedings of the 25th Annual Hawaii International Conference on System Sciences, 1992)
Adaptive Software Cache Management for Distributed Shared Memory Architectures (Proceedings of the 17th Annual International Symposium on Computer Architecture, 1990)
Techniques for Modeling and Performance Evaluation of Cache Memories and Cache Coherence Maintenance Mechanisms
Analysis of Multiprocessors with Private Cache Memories (IEEE Transactions on Computers, April 1982)
Effectiveness of Private Caches in Multiprocessor Systems with Parallel-Pipelined Memories (IEEE Transactions on Computers, January 1983)
On the Validity of Trace-Driven Simulation for Multiprocessors (Proceedings of the 18th Annual International Symposium on Computer Architecture, 1991)
Multiprocessor Cache Simulation Using Hardware Collected Address Traces (Proceedings of the 23rd Annual Hawaii International Conference on System Sciences, Volume 1, 1990)
Cache Invalidation Patterns in Shared-Memory Multiprocessors (IEEE Transactions on Computers, July 1992 Correction in Volume 41, No. 12)
Benchmark Characterization for Experimental System Evaluation (Proceedings of the 23rd Annual Hawaii International Conference on System Sciences, Volume 1, 1990)
A Model of Workloads and Its Use in Miss-Rate Prediction for Fully Associative Caches (IEEE Transactions on Computers, July 1992)
Performance Evaluation Studies of Software Coherence Schemes
A Performance Comparison of Directory-Based and Timestamp-Based Cache Coherence Schemes (Proceedings of the 1990 International Conference on Parallel Processing, Volume I, 1990)
Evaluating the Performance of Software Cache Coherence (Proceedings of the 3rd International Conference on Architectural Support for Programming Languages and Operating Systems, 1989)
Comparison of Hardware and Software Cache Coherence Schemes (Proceedings of the 18th Annual International Symposium on Computer Architecture, 1991)
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