Design Warrior's Guide to FPGAs Devices, Tools and Flows

ISBN-10: 0750676043

ISBN-13: 9780750676045

Edition: 2003

List price: $75.95
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'The Design Warrior's Guide to FPGAs' offers itself as a in-depth yet highly readable and up-to-date guide providing thorough coverage of FPGAs, as well as different design tools and flows, at a level suited to a technical/engineering audience.
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Book details

List price: $75.95
Copyright year: 2003
Publisher: Elsevier Science & Technology Books
Publication date: 4/12/2004
Binding: Paperback
Pages: 542
Size: 7.50" wide x 9.00" long x 1.50" tall
Weight: 2.530

Clive "Max" Maxfield received a BS in Control Engineering from Sheffield Polytechnic, England in 1980. He began his career as a mainframe CPU designer for International Computers Limited (ICL) in Manchester, England. Max now finds himself a member of the technical staff (MTS) at Intergraph Electronics, Huntsville, Alabama. Max is the author of dozens of articles and papers appearing in magazines and at technical conferences around the world. Max's main area of interest are currently focused in the analog, digital, and mixed-signal simulation of integrated circuits and multichip modules.

Fundamental Concepts
The Origin of FPGAs
Alternative FPGA Architectures
Programming (Configuring) an FPGA
Who Are All the Players?
HDL-Based Design Flows
Silicon Virtual Prototyping
C/C++ etc.Based Design Flows
DSP-Based Design Flows
Embedded Processor-Based
Modular and Incremental Design
High-Speed Design and Other PCB Considerations
Observing Internal Nodes in an FPGA
Intellectual Property
Migrating ASIC Designs to FPGAs and Vice Versa
Simulation, Synthesis, Verification, etc
Choosing the Right Device
Gigabit Transceivers
Reconfigurable Computing
Creating an Open-Source-Based Design Flow
Future FPGA Developments
Signal Integrity 101
Capacitive and inductive coupling(crosstalk)
Chip-level effects
Board-level effects
The evolution of delay specifications
Deep-Submicron Delay Effects 101
A potpourri of definitions
Alternative interconnect models
DSM delay effects Summary
The Ouroboras
Many-to-one implementations
Linear Feedback Shift Registers 101
More taps than you know what to do with
Seeding an LFSR
FIFO applications
Modifying LFSRs to sequence 2n values
Accessing the previous value
Encryption and decryption applications
Cyclic redundancy check applications
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