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Low-Voltage CMOS RF Frequency Synthesizers

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ISBN-10: 0521837774

ISBN-13: 9780521837774

Edition: 2004

Authors: Howard Cam Luong, Gerry Chi Tak Leung

List price: $137.00
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Description:

This book provides architectures and design techniques to enable CMOS frequency synthesizers to operate at low-supply voltage at high frequency with good phase noise and low power consumption. It offers in-depth updates on many of these techniques, and introduces useful guidelines and step-by-step procedures on behavior simulations of frequency synthesizers. Finally, the authors feature four successful prototypes to illustrate potential applications of the architectures and design techniques described. Their work will prove useful for engineers, managers, and researchers working in RFIC design for wireless applications.
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Book details

List price: $137.00
Copyright year: 2004
Publisher: Cambridge University Press
Publication date: 8/26/2004
Binding: Hardcover
Pages: 198
Size: 7.09" wide x 10.04" long x 0.63" tall
Weight: 1.276

List of figures
List of tables
Preface
Acknowledgements
Introduction
Motivation
Book organization
Synthesizer fundamentals
Introduction
Timing jitter
Phase noise
Phase-locked loop
Synthesizer architecture
Design of building blocks
Voltage-controlled oscillators (VCOs)
Dividers
Prescaler
Phase-frequency detectors (PFDs)
Charge pump
Loop filter
Inductor design
Varactor design
Switched-capacitor array (SCA)
Low-voltage design considerations and techniques
Introduction
System considerations
Voltage-controlled oscillators
Divide-by-2 circuit
High-speed clock buffer
Prescaler design
Charge pump
Behavioral simulation
Introduction
Linear model
Mathematical model
Behavioral model using AC analysis
Behavioral model using transient analysis
A 2 V 900 MHz monolithic CMOS dual-loop frequency synthesizer for GSM receivers
Design specification
Circuit implementation
Experimental results
A 1.5 V 900 MHz monolithic CMOS fast-switching frequency synthesizer for wireless applications
Introduction
Proposed synthesizer architecture
System specification and consideration
Circuit implementation
Layout consideration
Experimental results
Performance summary and evaluation
A 1 V 5.2 GHz fully integrated CMOS synthesizer for WLAN IEEE 802.11a
WLAN overview
Design specification
Synthesizer architecture
Quadrature phase generation
Behavioral simulation
Circuit implementation
Experimental results
References
Index