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Understanding Delta-Sigma Data Converters

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ISBN-10: 0471465852

ISBN-13: 9780471465850

Edition: 2005

Authors: Richard Schreier, Gabor C. Temes

List price: $160.00
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Description:

This book introduces the reader to the basic concepts of delta-sigma ADCs and DACs. It emphasizes the understanding of the physical operation and principles, with the mathematical background reduced to the minimum amount necessary for analysis and design.
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Book details

List price: $160.00
Copyright year: 2005
Publisher: John Wiley & Sons, Incorporated
Publication date: 11/8/2004
Binding: Hardcover
Pages: 464
Size: 7.50" wide x 9.25" long x 1.00" tall
Weight: 2.398
Language: English

Foreword
References
Introduction
The Need for Oversampling Converters
Delta and Delta-Sigma Modulation
Higher-Order Single-Stage Noise-Shaping Modulators
Multi-Stage (Cascade, MASH) Modulators
Bandpass [Delta Sigma] Modulators
[Delta Sigma] Modulators with Multi-Bit Quantizers
Delta-Sigma Digital-to-Analog Converters
History; Performance and Architecture Trends
The First-Order Delta Sigma Modulator
Quantizers and Quantization Noise
Binary Quantization
MOD1 as an ADC
MOD1 as a DAC
MOD1 Linear Model
Simulation of MOD1
MOD1 under DC Excitation
Idle Tone Generation
Graphical Visualization
Stability of MOD1
The Effects of Finite Op-Amp Gain
Linear Systems Perspective-Degraded Noise Shaping
Nonlinear Systems Perspective-Dead Zones
Decimation Filters for MOD1
The Sinc Filter [9]
The Sinc[superscript 2] Filter
Conclusions
The Second-Order Delta-Sigma Modulator
The Second-Order Modulator: MOD2
Simulation of MOD2
Nonlinear Effects in MOD2
Signal-dependent quantizer gain
Stability of MOD2
Dead-band behavior
Alternative Second-Order Modulator Structures
The Boser-Wooley Modulator
The Silva-Steensgaard Structure
The Error-Feedback Structure
Generalized Second-Order Structures
Optimal Second-Order Modulator
Decimation Filtering for Second-Order [Delta Sigma] Modulators
Conclusions
Higher-Order Delta-Sigma Modulation
High-Order Single-Quantizer Modulators
Stability Considerations in High-Order Modulators
Single-Bit Modulators
Multi-Bit Modulators [12]
Optimization of the NTF Zeros and Poles
NTF Zero Optimization
NTF Pole Optimization
Loop Filter Architectures
Loop Filters with Distributed Feedback and Input Coupling- The CIFB and CRFB Structures
Loop Filters with Distributed Feedforward and Input Coupling- The CIFF and CRFF Structures
Multi-Stage Modulators
The Leslie-Singh (L-O Cascade) Structure [16]
Cascade (MASH) Modulators
Noise Leakage in Cascade Modulators
Conclusions
Bandpass and Quadrature Delta-Sigma Modulation
The Need for Bandpass and Quadrature Modulation
Bandpass NTF Selection
Pseudo N-path transformation
Architectures for Bandpass Delta-Sigma Modulators
Topology Choices
Resonator Implementations
Bandpass Modulator Example
Quadrature Signals
Quadrature Modulation
Conclusions
Implementation Considerations For [Delta Sigma] ADCs
Modulators with Multi-Bit Internal Quantizers
Dual-Quantizer Modulators
Dual-Quantization MASH Structure
Dual-Quantization Single-Stage Structure
Dynamic Element Randomization
Mismatch Error Shaping
Element Rotation or Data-Weighted Averaging
Individual Level Averaging
Vector-Based Mismatch Shaping
Element Selection Using a Tree Structure
Digital Correction of DAC Nonlinearity
Digitally-Corrected Multi-Bit [Delta Sigma] Modulator with Power-Up Calibration
Digitally-Corrected Multi-Bit [Delta Sigma] ADC with Background Calibration
Continuous-Time Implementations
A Continuous-Time Implementation of MOD2
Inherent Anti-Aliasing in CT [Delta Sigma] ADCs
Design Issues for Continuous-Time Modulators
Conclusions
Delta-Sigma DACs
System Architectures for [Delta Sigma] DACs
Loop configurations for [Delta Sigma] DACs
Single-Stage Delta-Sigma Loops
The Error Feedback Structure
Cascade (MASH) Structures
[Delta Sigma] DACs Using Multi-Bit Internal DACs
Dual-Truncation DAC Structures
Multi-bit Delta-Sigma DACs with Mismatch Error Shaping
Digital Correction of Multi-Bit Delta-Sigma DACs
Comparison of Single-Bit and Multi-Bit [Delta Sigma] DACs
Interpolation Filtering for [Delta Sigma] DACs
Analog Post-Filters for [Delta Sigma] DACs
Analog Post-Filtering in Single-Bit [Delta Sigma] DACs
Analog Post-Filtering in Multi-Bit [Delta Sigma] DACs
Conclusions
High-Level Design and Simulation
NTF Synthesis
How synthesizeNTF works
Limitations of synthesizeNTF
NTF Simulation, SQNR Calculation and Spectral Estimation
NTF Realization and Dynamic Range Scaling
The ABCD Matrix
Creating a SPICE-Simulatable Schematic
Voltage Scaling
Timing
kT/C Noise
Conclusions
Example Modulator Systems
SCMOD2: General-Purpose Second-Order Switched-Capacitor ADC
System Design
Timing
Scaling
Verification
Capacitor Sizing
Circuit Design
SCMOD5: A Fifth-Order Single-Bit Noise-Shaping Loop
NTF and Architecture Selection
Implementation
Instability and Reset
A Wideband 2-0 Cascade System
Architecture
Implementation
A Micropower Continuous-Time ADC
High-Level Design
Circuit Design
A Continuous-Time Bandpass ADC
Architecture/Analysis
Subcircuits
Audio DAC
Modulator Design
Interpolation Filter Design
DAC and Reconstruction Filter Design
Conclusions
The ADC State-of-the-Art
FOM Justification
References
Spectral Estimation
Windowing
Scaling and Noise Bandwidth
Averaging
An Example
Mathematical Background
The Delta-Sigma Toolbox
Demonstrations and Examples
Summary of Key Functions
synthesizeNTF
predictSNR
simulateDSM
simulateSNR
realizeNTF
stuffABCD, mapABCD
scaleABCD
calculateTF
simulateESL
designHBF
simulateHBF
findPIS
Modulator Model Details
Noise in Switched-Capacitor Delta-Sigma Data Converters
Noise Effects in CMOS Op Amps
Sampled Thermal Noise
Noise Effects in an SC Integrator
Integrator Noise Analysis Example
Noise Effects in Delta-Sigma ADC Loops