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Network Processor Design Issues and Practices

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ISBN-10: 0121981576

ISBN-13: 9780121981570

Edition: 2004

Authors: Mark A. Franklin, Patrick Crowley, Haldun Hadimioglu, Peter Z. Onufryk

List price: $98.95
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Aimed at practitioners and researchers, this textbook introduces an important group of commercial and proprietary network processors. The contributors cover all of the practical issues involved in the design and use of this class of application-specific processor.
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Book details

List price: $98.95
Copyright year: 2004
Publisher: Elsevier Science & Technology
Publication date: 12/2/2003
Binding: Paperback
Pages: 464
Size: 7.25" wide x 9.00" long x 1.25" tall
Weight: 1.782
Language: English

Patrick Crowley is an associate Professor in the Department of Computer Science & Engineering at Washington University in St. Louis, Missouri. His research interests are in computer and network systems architecture, with a current focus on the design of programmable embedded network systems and the invention of superior network monitoring and security techniques. He co-founded the ACM/IEEE Symposium on Architectures for Networking and Communications Systems, and co-edited the three-book series, Network Processor Design. He serves as Associate Editor of the IEEE/ACM Transactions on Networking. In 2007, Crowley was chosen to join the DARPA Computer Science Study Group.

Haldun Hadimioglu received his BS and MS degrees in Electrical Engineering at Middle East Technical University, Ankara Turkey and his Ph.D. in Computer Science from Polytechnic University in New York. He is currently an Industry Associate Professor in the Computer Science Department and a member of the Computer Engineering faculty at the Polytechnic University. He worked as a research engineer at PETAS, Ankara Turkey (1980-1982). Dr. Hadimioglu's research and teaching interests include Computer Architecture, Parallel and Distributed Systems, Networking and VLSI Design. He was a guest editor of the special issue on "Advances in High Performance Memory Systems," IEEE Transactions on Computers…    

Network Processor Design: Issues and Practics, Volume 2
Network Processors: Themes and Challenges
Design Principles
A Programmable Scalable Platform for Next Generation Networking
Power Considerations in Network Processor Design
Worst-Case Execution Time Estimation for Hardware-assisted Multithreaded Processors
Multiprocessor Scheduling in Processor-based Router Platforms: Issues and Ideas
A Massively Multithreaded Packet Processor
Exploring Trade-offs in Performance and Programmability of Processing Element Topologies for Network Processors
Packet Classification and Termination in a Protocol Processor
NP-Click: A Programming Model for the Intel IXP1200
NEPAL: A Framework for Efficiently Structuring Applications for Network Processors
Efficient and Faithful Performance Modeling for Network-Processor Based System Designs
High-speed Legitimacy-based DDoS Packet Filtering with Network Processors: A Case Study and Implementation on the Intel IXP1200
Directions in Packet Classification for Network Processors
Implementing High-performance, High-value Traffic Management Using Agere Network Processor Solutions
AMCC - nPcoreTM "NISC" Architecture
Adaptable Badwidth Allocation for QoS Support in Network Processors
IDT - Network Search Engine with QDRTM LA-1 Interface
Implementing Voice over AAL2 on a Network Processor
Implementing QoS Mechanisms on the Motorola C-Port C-5e Network Processor
A C-based Programming Language for Multiprocessor Network SoC Architectures