SystemVerilog for Verification A Guide to Learning the Testbench Language Features

Name: SystemVerilog for Verification A Guide to Learning the Testbench Language Features
Availability: InStock
ISBN: 9781461407140

ISBN-10: 1461407141

ISBN-13: 9781461407140

Edition: 3rd 2012

Authors: Chris Spear, Greg Tumbush

List price: $119.99

This item qualifies for FREE shipping.

30 day, 100% satisfaction guarantee!

Sell

Get cash fast!

Buy new: $104.31

Rent eBooks

180 day rental: $45.50 Expiration date: 10/14/2024

Marketplace

5 new & used from $46.27

what's this?

Rush Rewards U
Members Receive:

You have reached 400 XP and carrot coins. That is the daily max!

Description:

Based on the highly successful second edition, this extended edition of SystemVerilog for Verification: A Guide to Learning the Testbench Language Features teaches all verification features of the SystemVerilog language, providing hundreds of examples to clearly explain the concepts and basic fundamentals. It contains materials for both the full-time verification engineer and the student learning this valuable skill. In the third edition, authors Chris Spear and Greg Tumbush start with how to verify a design, and then use that context to demonstrate the language features, including the advantages and disadvantages of different styles, allowing readers to choose between alternatives. This…

Book details

List price: $119.99
Edition: 3rd
Copyright year: 2012
Publisher: Springer
Publication date: 2/14/2012
Binding: Hardcover
Pages: 464
Size: 6.10" wide x 9.25" long x 0.44" tall
Weight: 1.848
Language: English