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Introduction | |
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Overview | |
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The Main Components of a Computer | |
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An Example System: Wading Through the Jargon | |
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Standards Organizations | |
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Historical Development | |
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Generation Zero: Mechanical Calculating Machines (1642-1945) | |
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The First Generation: Vacuum Tube Computers (1945-1953) | |
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The Second Generation: Transistorized Computers (1954-1965) | |
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The Third Generation: Integrated Circuit Computers (1965-1980) | |
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The Fourth Generation: VLSI Computers (1980-????) | |
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Moore's Law | |
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The Computer Level Hierarchy | |
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The von Neumann Model | |
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Non-von Neumann Models | |
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Chapter Summary | |
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Further Reading | |
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References | |
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Review of Essential Terms and Concepts | |
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Exercises | |
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Data Representation in Computer Systems | |
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Introduction | |
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Positional Numbering Systems | |
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Decimal to Binary Conversions | |
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Converting Unsigned Whole Numbers | |
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Converting Fractions | |
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Converting between Power-of-Two Radices | |
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Signed Integer Representation | |
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Signed Magnitude | |
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Complement Systems | |
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Unsigned Versus Signed Numbers | |
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Computers, Arithmetic, and Booth's Algorithm | |
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Carry Versus Overflow | |
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Floating-Point Representation | |
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A Simple Model | |
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Floating-Point Arithmetic | |
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Floating-Point Errors | |
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The IEEE-754 Floating-Point Standard | |
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Range, Precision, and Accuracy | |
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Additional Problems with Floating-Point Numbers | |
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Character Codes | |
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Binary-Coded Decimal | |
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EBCDIC | |
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ASCII | |
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Unicode | |
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Error Detection and Correction | |
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Cyclic Redundancy Check | |
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Hamming Codes | |
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Reed-Soloman | |
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Chapter Summary | |
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Further Reading | |
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References | |
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Review of Essential Terms and Concepts | |
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Exercises | |
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Boolean Algebra and Digital Logic | |
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Introduction | |
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Boolean Algebra | |
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Boolean Expressions | |
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Boolean Identities | |
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Simplification of Boolean Expressions | |
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Complements | |
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Representing Boolean Functions | |
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Logic Gates | |
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Symbols for Logic Gates | |
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Universal Gates | |
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Multiple Input Gates | |
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Digital Components | |
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Digital Circuits and Their Relationship to Boolean Algebra | |
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Integrated Circuits | |
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Combinational Circuits | |
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Basic Concepts | |
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Examples of Typical Combinational Circuits | |
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Sequential Circuits | |
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Basic Concepts | |
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Clocks | |
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Flip-Flops | |
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Finite State Machines | |
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Examples of Sequential Circuits | |
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An Application of Sequential Logic: Convolutional Coding and Viterbi Detection | |
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Designing Circuits | |
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Chapter Summary | |
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Further Reading | |
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References | |
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Review of Essential Terms and Concepts | |
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Exercises | |
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MARIE: An Introduction to a Simple Computer | |
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Introduction | |
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CPU Basics and Organization | |
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The Registers | |
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The ALU | |
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The Control Unit | |
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The Bus | |
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Clocks | |
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The Input/Output Subsystem | |
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Memory Organization and Addressing | |
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Interrupts | |
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MARIE | |
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The Architecture | |
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Registers and Buses | |
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Instruction Set Architecture | |
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Register Transfer Notation | |
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Instruction Processing | |
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The Fetch-Decode-Execute Cycle | |
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Interrupts and the Instruction Cycle | |
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MARIE's I/O | |
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A Simple Program | |
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A Discussion on Assemblers | |
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What Do Assemblers Do? | |
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Why Use Assembly Language? | |
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Extending our Instruction Set | |
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A Discussion on Decoding: Hardwired Versus Microprogrammed Control | |
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Machine Control | |
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Hardwired Control | |
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Microprogrammed Control | |
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Real-World Examples of Computer Architectures | |
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Intel Architectures | |
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MIPS Architectures | |
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Chapter Summary | |
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Further Reading | |
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References | |
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Review of Essential Terms and Concepts | |
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Exercises | |
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A Closer Look at Instruction Set Architectures | |
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Introduction | |
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Instruction Formats | |
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Design Decisions for Instruction Sets | |
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Little Versus Big Endian | |
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Internal Storage in the CPU: Stacks Versus Registers | |
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Number of Operands and Instruction Length | |
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Expanding Opcodes | |
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Instruction Types | |
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Data Movement | |
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Arithmetic Operations | |
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Boolean Logic Instructions | |
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Bit Manipulation Instructions | |
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Input/Output Instructions | |
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Instructions for Transfer of Control | |
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Special Purpose Instructions | |
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Instruction Set Orthogonality | |
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Addressing | |
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Data Types | |
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Address Modes | |
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Instruction-Level Pipelining | |
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Real-World Examples of ISAs | |
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Intel | |
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MIPS | |
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Java Virtual Machine | |
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Chapter Summary | |
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Further Reading | |
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References | |
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Review of Essential Terms and Concepts | |
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Exercises | |
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Memory | |
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Introduction | |
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Types of Memory | |
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The Memory Hierarchy | |
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Locality of Reference | |
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Cache Memory | |
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Cache Mapping | |
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Replacement Policies | |
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Effective Access Time and Hit Ratio | |
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When Does Caching Break Down? | |
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Cache Write Policies | |
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Instruction and Data Caches | |
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Levels of Cache | |
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Virtual Memory | |
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Paging | |
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Effective Access Time Using Paging | |
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Putting It All Together: Using Cache, TLBs, and Paging | |
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Advantages and Disadvantages of Paging and Virtual Memory | |
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Segmentation | |
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Paging Combined with Segmentation | |
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A Real-World Example of Memory Management | |
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Chapter Summary | |
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Further Reading | |
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References | |
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Review of Essential Terms and Concepts | |
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Exercises | |
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Input/Output and Storage Systems | |
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Introduction | |
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I/O and Performance | |
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Amdahl's Law | |
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I/O Architectures | |
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I/O Control Methods | |
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Character I/O Versus Block I/O | |
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I/O Bus Operation | |
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Data Transmission Modes | |
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Parallel Data Transmission | |
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Serial Data Transmission | |
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Magnetic Disk Technology | |
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Rigid Disk Drives | |
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Flexible (Floppy) Disks | |
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Optical Disks | |
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CD-ROM | |
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DVD | |
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Blue-Violet Laser Disks | |
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Optical Disk Recording Methods | |
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Magnetic Tape | |
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RAID | |
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RAID Level 0 | |
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RAID Level 1 | |
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RAID Level 2 | |
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RAID Level 3 | |
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RAID Level 4 | |
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RAID Level 5 | |
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RAID Level 6 | |
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RAID DP | |
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Hybrid RAID Systems | |
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The Future of Data Storage | |
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Chapter Summary | |
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Further Reading | |
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References | |
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Review of Essential Terms and Concepts | |
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Exercises | |
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System Software | |
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Introduction | |
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Operating Systems | |
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Operating Systems History | |
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Operating System Design | |
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Operating System Services | |
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Protected Environments | |
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Virtual Machines | |
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Subsystems and Partitions | |
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Protected Environments and the Evolution of Systems Architectures | |
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Programming Tools | |
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Assemblers and Assembly | |
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Link Editors | |
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Dynamic Link Libraries | |
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Compilers | |
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Interpreters | |
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Java: All of the Above | |
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Database Software | |
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Transaction Managers | |
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Chapter Summary | |
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Further Reading | |
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References | |
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Review of Essential Terms and Concepts | |
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Exercises | |
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Alternative Architectures | |
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Introduction | |
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RISC Machines | |
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Flynn's Taxonomy | |
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Parallel and Multiprocessor Architectures | |
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Superscalar and VLIW | |
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Vector Processors | |
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Interconnection Networks | |
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Shared Memory Multiprocessors | |
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Distributed Computing | |
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Alternative Parallel Processing Approaches | |
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Dataflow Computing | |
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Neural Networks | |
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Systolic Arrays | |
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Quantum Computing | |
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Chapter Summary | |
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Further Reading | |
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References | |
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Review of Essential Terms and Concepts | |
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Exercises | |
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Topics in Embedded Systems | |
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Introduction | |
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An Overview of Embedded Hardware | |
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Off-the-Shelf Embedded System Hardware | |
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Configurable Hardware | |
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Custom-Designed Embedded Hardware | |
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An Overview of Embedded Software | |
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Embedded Systems Memory Organization | |
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Embedded Operating Systems | |
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Embedded Systems Software Development | |
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Chapter Summary | |
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Further Reading | |
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References | |
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Review of Essential Terms and Concepts | |
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Exercises | |
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Performance Measurement and Analysis | |
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Introduction | |
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Computer Performance Equations | |
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Mathematical Preliminaries | |
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What the Means Mean | |
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The Statistics and Semantics | |
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Benchmarking | |
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Clock Rate, MIPS, and FLOPS | |
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Synthetic Benchmarks: Whetstone, Linpack, and Dhrystone | |
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Standard Performance Evaluation Corporation Benchmarks | |
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Transaction Processing Performance Council Benchmarks | |
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System Simulation | |
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CPU Performance Optimization | |
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Branch Optimization | |
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Use of Good Algorithms and Simple Code | |
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Disk Performance | |
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Understanding the Problem | |
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Physical Considerations | |
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Logical Considerations | |
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Chapter Summary | |
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Further Reading | |
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References | |
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Review of Essential Terms and Concepts | |
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Exercises | |
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Network Organization and Architecture | |
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Introduction | |
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Early Business Computer Networks | |
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Early Academic and Scientific Networks: The Roots and Architecture of the Internet | |
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Network Protocols I: ISO/OSI Protocol Unification | |
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A Parable | |
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The OSI Reference Model | |
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Network Protocols II: TCP/IP Network Architecture | |
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The IP Layer for Version 4 | |
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The Trouble with IP Version 4 | |
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Transmission Control Protocol | |
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The TCP Protocol at Work | |
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IP Version 6 | |
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Network Organization | |
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Physical Transmission Media | |
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Interface Cards | |
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Repeaters | |
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Hubs | |
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Switches | |
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Bridges and Gateways | |
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Routers and Routing | |
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High-Capacity Digital Links | |
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The Digital Hierarchy | |
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ISDN | |
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Asynchronous Transfer Mode | |
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A Look at the Internet | |
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Ramping on to the Internet | |
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Ramping up the Internet | |
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Chapter Summary | |
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Further Reading | |
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References | |
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Review of Essential Terms and Concepts | |
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Exercises | |
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Selected Storage Systems and Interfaces | |
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Introduction | |
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SCSI Architecture | |
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"Classic" Parallel SCSI | |
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The SCSI Architecture Model-3 | |
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Internet SCSI | |
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Storage Area Networks | |
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Other I/O Connections | |
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Parallel Buses: XT to ATA | |
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Serial ATA and Serial Attached SCSI | |
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Peripheral Component Interconnect | |
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A Serial Interface: USB | |
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High Performance Peripheral Interface: HiPPI | |
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Chapter Summary | |
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Further Reading | |
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References | |
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Review of Essential Terms and Concepts | |
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Exercises | |
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Data Structures and the Computer | |
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Introduction | |
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Fundamental Structures | |
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Arrays | |
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Queues and Linked Lists | |
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Stacks | |
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Trees | |
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Network Graphs | |
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Summary | |
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Further Reading | |
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References | |
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Exercises | |
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Glossary | |
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Answers and Hints for Selected Exercises | |
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Index | |