Chip Design for Submicron VLSI CMOS Layout and Simulation

ISBN-10: 053446629X
ISBN-13: 9780534466299
Edition: 2nd 2006
Authors: John P. Uyemura
List price: $217.95 Buy it from $19.50
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Description: The text is organized around first introducing the global view of digital integrated circuit design, VLSI and design automation, and then sequentially developing the topics from the materials and devices level, up through the circuits and then  More...

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Book details

List price: $217.95
Edition: 2nd
Copyright year: 2006
Publisher: Course Technology
Publication date: 2/8/2005
Binding: Hardcover
Pages: 432
Size: 8.00" wide x 9.25" long x 0.75" tall
Weight: 1.980
Language: English

The text is organized around first introducing the global view of digital integrated circuit design, VLSI and design automation, and then sequentially developing the topics from the materials and devices level, up through the circuits and then system level. This mirrors the structural hierarchy of the chip design field itself. While building a solid foundation and reference for the chip design, it integrates the discussion with hands-on examples of the design automation software, included in the book, to illustrate not only the layout and simulation concepts, but also how an industry designer would put them into practice. Both theory and application are effectively integrated into a cohesive treatment of the subject and art of chip design.

John P. Uyemura is Professor of Electrical and Computer Engineering, late of Georgia Institute of Technology.

Installing the Microwind Software
Getting Started
Exploring Microwind
Installing Dsch
Plan of the Book
Some Important Details
References
Views of a Chip
The Design Hierarchy
Integrated Circuit Layers
Photolithography and Patter Transfer
Planarization
Electrical Characteristics
Silicon Characteristics
Overview of Layout Design
References
Exercises
CMOS Technology
Meet the Mosfets
CMOS Fabrication
Submicron CMOS Processes
Process Technologies in Microwind
Masks and Layout
The Microwind MOS Generator
Chapter Summary and Roadmap
References
Exercises
Using a Layout Editor
Lambda-Based Layout
Rectangles and Polygons
The MOS Generator Revisited
Summary
Exercises
CMOS Design Rules
Types of Rules
The SCMOS Design Rule Set
FET Layout
References
Exercises
Mosfets
MOSFET Operation
MOSFET Switch Models
The Square Law Model
MOSFET Parasitics
Comments on Devise Layout
References
Exercises
Mosfet Modeling with Spice
Spice Levels
Mosfet Modeling in Microwind
Circuit Extraction
Microwind Level 3 and BSIM4 Equations
References
Exercises
CMOS Logic Gates
The Inverter
Nand and Nor Gates
Complex Logic Gates
The Microwind Compile Command
Tri-State Circuits
Large Fets
Transmission Gates and Pass Logic
References
Exercises
Standard Cell Design
Cell Hierarchies
Cell Libraries
Library Entries
Cell Shapes and Floor Planning
References
Exercises
Storage Elements
SR Latch
Bit-level Register
D-type Flip Flop
Dynamic DFF
The Static RAM Cell
References
Exercises
Dynamic Logic Circuits
Basic Dynamic Logic Gates
Domino Logic
Self-Resetting Logic
Dynamic Memories
References
Exercises
Interconnects
Modeling an Isolated Line
Long Interconnects
Crosstalk Capacitances
Interconnect Wiring Tools
General Routing Techniques
References
Exercises
System Layout
Power Supply Distribution
Pad Generation
Input and Output Circuits
The Logo Generator
References
Exercises
SOI Technology
Modern SOI CMOS
Why SOI?
Problems with SOI
SOI in Microwind
References
Exercises
Digital System Design 1
A First Look
Editing Features
Creating a Logic Schematic
Simulating a Logic Design
Creating a Macro Symbol
Creating A Verilog “ Listing
The DSCH-Microwind Design Flow
Using a Design Toolset
MOSFETs in Dsch
References
Exercises
Digital System Design 2
A 4-bit Binary Adder
Carry Lookahead Adder
Pipeline Register
Divide-by-N Circuit
Binary Counter
Summary
References
Exercises
Capacitors and Inductors
Integrated Capacitors
Integrated Inductors
References
Exercises
Analog CMOS Circuits
Simple Amplifiers
MOSFETs
Resistors
Signal Wiring
Summary
References
Exercises
Microwind Command Summary
File
View
Edit
Simulate
Compile
Analysis
Help
Menu Bar
Other Screens
Microwind CMOS Technology Files
Index

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