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Integrated-Circuit Devices And Modelling | |

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Semiconductors and pn Junctions | |

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Diodes | |

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Reverse-Biased Diodes | |

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Graded Junctions | |

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Large-Signal Junction Capacitance | |

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Forward-Biased Junctions | |

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Junction Capacitance of Forward-Biased Diode | |

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Small-Signal Model of a Forward-Biased Diode | |

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Schottky Diodes | |

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MOS Transistors | |

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Symbols for MOS Transistors | |

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Basic Operation | |

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Large-Signal Modelling | |

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Body Effect | |

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p-Channel Transistors | |

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Low-Frequency Small-Signal Modelling in the Active Region | |

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High-Frequency Small-Signal Modelling in the Active Region | |

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Small-Signal Modelling in the Triode and Cutoff Regions | |

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Analog Figures of Merit and Trade-offs | |

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Device Model Summary | |

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Constants | |

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Diode Equations | |

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MOS Transistor Equations | |

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Advanced MOS Modelling | |

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Subthreshold Operation | |

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Mobility Degradation | |

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Summary of Subthreshold and Mobility Degradation Equations | |

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Parasitic Resistances | |

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Short-Channel Effects | |

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Leakage Currents | |

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SPICE Modelling Parameters | |

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Diode Model | |

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MOS Transistors | |

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Advanced SPICE Models of MOS Transistors | |

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Passive Devices | |

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Resistors | |

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Capacitors | |

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Appendix | |

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Diode Exponential Relationship | |

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Diode-Diffusion Capacitance | |

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MOS Threshold Voltage and the Body Effect | |

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MOS Triode Relationship | |

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Key Points | |

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References | |

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Problems | |

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Processing And Layout | |

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CMOS Processing | |

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The Silicon Wafer | |

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Photolithography and Well Definition | |

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Diffusion and Ion Implantation | |

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Chemical Vapor Deposition and Defining the Active Regions | |

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Transistor Isolation | |

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Gate-Oxide and Threshold-Voltage Adjustments | |

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Polysilicon Gate Formation | |

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Implanting the Junctions, Depositing SiO2, and Opening Contact Holes | |

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Annealing, Depositing and Patterning Metal, and Overglass Deposition | |

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Additional Processing Steps | |

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CMOS Layout and Design Rules | |

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Spacing Rules | |

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Planarity and Fill Requirements | |

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Antenna Rules | |

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Latch-Up | |

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Variability and Mismatch | |

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Systematic Variations Including Proximity Effects | |

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Process Variations | |

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Random Variations and Mismatch | |

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Analog Layout Considerations | |

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Transistor Layouts | |

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Capacitor Matching | |

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Resistor Layout | |

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Noise Considerations | |

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Key Points | |

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References | |

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Problems | |

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Basic Current Mirrors And Single-Stage Amplifiers | |

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Simple CMOS Current Mirror | |

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Common-Source Amplifier | |

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Source-Follower or Common-Drain Amplifier | |

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Common-Gate Amplifier | |

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Source-Degenerated Current Mirrors | |

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Cascode Current Mirrors | |

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Cascode Gain Stage | |

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MOS Differential Pair and Gain Stage | |

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Key Points | |

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References | |

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Problems | |

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Frequency Response Of Electronic Circuits | |

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Frequency Response of Linear Systems | |

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Magnitude and Phase Response | |

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First-Order Circuits | |

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Second-Order Low-Pass Transfer Functions with Real Poles | |

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Bode Plots | |

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Second-Order Low-Pass Transfer Functions with Complex Poles | |

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Frequency Response of Elementary Transistor Circuits | |

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High-Frequency MOS Small-Signal Model | |

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Common-Source Amplifier | |

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Miller Theorem and Miller Effect | |

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Zero-Value Time-Constant Analysis | |

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Common-Source Design Examples | |

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Common-Gate Amplifier | |

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Cascode Gain Stage | |

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Source-Follower Amplifier | |

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Differential Pair | |

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High-Frequency T-Model | |

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Symmetric Differential Amplifier | |

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Single-Ended Differential Amplifier | |

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Differential Pair with Active Load | |

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Key Points | |

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References | |

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Problems | |

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Feedback Amplifiers | |

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Ideal Model of Negative Feedback | |

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Basic Definitions | |

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Gain Sensitivity | |

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Bandwidth | |

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Linearity | |

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Summary | |

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Dynamic Response of Feedback Amplifiers | |

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Stability Criteria | |

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Phase Margin | |

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First- and Second-Order Feedback Systems | |

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First-Order Feedback Systems | |

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Second-Order Feedback Systems | |

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Higher-Order Feedback Systems | |

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Common Feedback Amplifiers | |

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Obtaining the Loop Gain, L(s) | |

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Non-Inverting Amplifier | |

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Transimpedance (Inverting) Amplifiers | |

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Summary of Key Points | |

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References | |

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Problems | |

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Basic Opamp Design And Compensation | |

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Two-Stage CMOS Opamp | |

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Opamp Gain | |

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Frequency Response | |

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Slew Rate | |

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n-Channel or p-Channel Input Stage | |

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Systematic Offset Voltage | |

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Opamp Compensation | |

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Dominant-Pole Compensation and Lead Compensation | |

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Compensating the Two-Stage Opamp | |

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Making Compensation Independent of Process and Temperature | |

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Advanced Current Mirrors | |

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Wide-Swing Current Mirrors | |

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Enhanced Output-Impedance Current Mirrors and Gain Boosting | |

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Wide-Swing Current Mirror with Enhanced Output Impedance | |

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Current-Mirror Symbol | |

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Folded-Cascode Opamp | |

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Small-Signal Analysis | |

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Slew Rate | |

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Current Mirror Opamp | |

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Linear Settling Time Revisited | |

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Fully Differential Opamps | |

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Fully Differential Folded-Cascode Opamp | |

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Alternative Fully Differential Opamps | |

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Low Supply Voltage Opamps | |

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Common-Mode Feedback Circuits | |

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Summary of Key Points | |

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References | |

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Problems | |

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Biasing, References, And Regulators | |

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Analog Integrated Circuit Biasing | |

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Bias Circuits | |

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Reference Circuits | |

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Regulator Circuits | |

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Establishing Constant Transconductance | |

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Basic Constant-Transconductance Circuit | |

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Improved Constant-Transconductance Circuits | |

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Establishing Constant Voltages and Currents | |

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Bandgap Voltage Reference Basics | |

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Circuits for Bandgap References | |

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Low-Voltage Bandgap Reference | |

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Current Reference | |

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Voltage Regulation | |

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Regulator Specifications | |

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Feedback Analysis | |

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Low Dropout Regulators | |

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Summary of Key Points | |

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References | |

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Problems | |

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Bipolar Devices And Circuits | |

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Bipolar-Junction Transistors | |

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Basic Operation | |

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Analog Figures of Merit | |

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Bipolar Device Model Summary | |

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SPICE Modeling | |

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Bipolar and BICMOS Processing | |

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Bipolar Processing | |

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Modern SiGe BiCMOS HBT Processing | |

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Mismatch in Bipolar Devices | |

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Bipolar Current Mirrors and Gain Stages | |

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Current Mirrors | |

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Emitter Follower | |

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Bipolar Differential Pair | |

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Appendix | |

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Bipolar Transistor Exponential Relationship | |

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Base Charge Storage of an Active BJT | |

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Summary of Key Points | |

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References | |

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Problems | |

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Noise And Linearity Analysis And Modelling | |

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Time-Domain Analysis | |

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Root Mean Square (rms) Value | |

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SNR | |

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Units of dBm | |

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Noise Summation | |

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Frequency-Domain Analysis | |

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Noise Spectral Density | |

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White Noise | |

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1/f, or Flicker, Noise | |

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Filtered Noise | |

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Noise Bandwidth | |

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Piecewise Integration of Noise | |

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1/f Noise Tangent Principle | |

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Noise Models for Circuit Elements | |

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Resistors | |

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Diodes | |

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Bipolar Transistors | |

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MOSFETS | |

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Opamps | |

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Capacitors and Inductors | |

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Sampled Signal Noise | |

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Input-Referred Noise | |

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Noise Analysis Examples | |

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Opamp Example | |

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Bipolar Common-Emitter Example | |

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CMOS Differential Pair Example | |

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Fiber-Optic Transimpedance Amplifier Example | |

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Dynamic Range Performance | |

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Total Harmonic Distortion (THD) | |

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Third-Order Intercept Point (IP3) | |

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Spurious-Free Dynamic Range (SFDR) | |

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Signal-to-Noise and Distortion Ratio (SNDR) | |

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Key Points | |

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References | |

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Problems | |

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Comparators | |

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Comparator Specifications | |

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Input Offset and Noise | |

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Hysteresis | |

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Using an Opamp for a Comparator | |

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Input-Offset Voltage Errors | |

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Charge-Injection Errors | |

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Making Charge-Injection Signal Independent | |

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Minimizing Errors Due to Charge-Injection | |

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Speed of Multi-Stage Comparators | |

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Latched Comparators | |

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Latch-Mode Time Constant | |

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Latch Offset | |

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Examples of CMOS and BiCMOS Comparators | |

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Input-Transistor Charge Trapping | |

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Examples of Bipolar Comparators | |

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Key Points | |

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References | |

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Problems | |

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Sample-And-Hold And Translinear Circuits | |

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Performance of Sample-and-Hold Circuits | |

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Testing Sample and Holds | |

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MOS Sample-and-Hold Basics | |

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Examples of CMOS S/H Circuits | |

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Bipolar and BiCMOS Sample-and-Holds | |

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Translinear Gain Cell | |

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Translinear Multiplier | |

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Key Points | |

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References | |

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Problems | |

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Continuous-Time Filters | |

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Introduction to Continuous-Time Filters | |

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First-Order Filters | |

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Second-Order Filters | |

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Introduction to Gm-C Filters | |

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Integrators and Summers | |

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Fully Differential Integrators | |

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First-Order Filter | |

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Biquad Filter | |

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Transconductors Using Fixed Resistors | |

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CMOS Transconductors Using Triode Transistors | |

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Transconductors Using a Fixed-Bias Triode Transistor | |

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Transconductors Using Varying Bias-Triode Transistors | |

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Transconductors Using Constant Drain-Source Voltages | |

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CMOS Transconductors Using Active Transistors | |

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CMOS Pair | |

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Constant Sum of Gate-Source Voltages | |

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Source-Connected Differential Pair | |

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Inverter-Based | |

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Differential-Pair with Floating Voltage Sources | |

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Bias-Offset Cross-Coupled Differential Pairs | |

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Bipolar Transconductors | |

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Gain-Cell Transconductors | |

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Transconductors Using Multiple Differential Pairs | |

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BiCMOS Transconductors | |

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Tunable MOS in Triode | |

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Fixed-Resistor Transconductor with a Translinear Multiplier | |

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Fixed Active MOS Transconductor with a Translinear Multiplier | |

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Active RC and MOSFET-C Filters | |

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Active RC Filters | |

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MOSFET-C Two-Transistor Integrators | |

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Four-Transistor Integrators | |

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R-MOSFET-C Filters | |

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Tuning Circuitry | |

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Tuning Overview | |

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Constant Transconductance | |

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Frequency Tuning | |

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Q-Factor Tuning | |

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Tuning Methods Based on Adaptive Filtering | |

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Introduction to Complex Filters | |

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Complex Signal Processing | |

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Complex Operations | |

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Complex Filters | |

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Frequency-Translated Analog Filters | |

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Key Points | |

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References | |

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Problems | |

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Discrete-Time Signals | |

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Overview of Some Signal Spectra | |

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Laplace Transforms of Discrete-Time Signals | |

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Spectra of Discrete-Time Signals | |

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z-Transform | |

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Downsampling and Upsampling | |

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Discrete-Time Filters | |

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Frequency Response of Discrete-Time Filters | |

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Stability of Discrete-Time Filters | |

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IIR and FIR Filters | |

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Bilinear Transform | |

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Sample-and-Hold Response | |

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Key Points | |

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References | |

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Problems | |

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Switched-Capacitor Circuits | |

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Basic Building Blocks | |

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Opamps | |

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Capacitors | |

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Switches | |

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Nonoverlapping Clocks | |

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Basic Operation and Analysis | |

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Resistor Equivalence of a Switched Capacitor | |

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Parasitic-Sensitive Integrator | |

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Parasitic-Insensitive Integrators | |

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Signal-Flow-Graph Analysis | |

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Noise in Switched-Capacitor Circuits | |

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First-Order Filters | |

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Switch Sharing | |

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Fully Differential Filters | |

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Biquad Filters | |

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Low-Q Biquad Filter | |

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High-Q Biquad Filter | |

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Charge Injection | |

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Switched-Capacitor Gain Circuits | |

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Parallel Resistor-Capacitor Circuit | |

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Resettable Gain Circuit | |

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Capacitive-Reset Gain Circuit | |

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Correlated Double-Sampling Techniques | |

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Other Switched-Capacitor Circuits | |

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| |

Amplitude Modulator | |

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Full-Wave Rectifier | |

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Peak Detectors | |

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Voltage-Controlled Oscillator | |

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Sinusoidal Oscillator | |

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Key Points | |

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References | |

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| |

Problems | |

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| |

Data Converter Fundamentals | |

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Ideal D/A Converter | |

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Ideal A/D Converter | |

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Quantization Noise | |

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Deterministic Approach | |

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Stochastic Approach | |

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Signed Codes | |

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Performance Limitations | |

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Resolution | |

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Offset and Gain Error | |

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Accuracy and Linearity | |

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Key Points | |

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References | |

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Problems | |

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| |

Nyquist-Rate D/A Converters | |

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Decoder-Based Converters | |

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Resistor String Converters | |

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Folded Resistor-String Converters | |

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Multiple Resistor-String Converters | |

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Signed Outputs | |

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Binary-Scaled Converters | |

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Binary-Weighted Resistor Converters | |

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Reduced-Resistance-Ratio Ladders | |

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R-2R-Based Converters | |

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Charge-Redistribution Switched-Capacitor Converters | |

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Current-Mode Converters | |

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Glitches | |

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Thermometer-Code Converters | |

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Thermometer-Code Current-Mode D/A Converters | |

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Single-Supply Positive-Output Converters | |

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Dynamically Matched Current Sources | |

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Hybrid Converters | |

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Resistor-Capacitor Hybrid Converters | |

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Segmented Converters | |

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Key Points | |

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References | |

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Problems | |

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Nyquist-Rate A/D Converters | |

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Integrating Converters | |

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Successive-Approximation Converters | |

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DAC-Based Successive Approximation | |

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Charge-Redistribution A/D | |

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Resistor-Capacitor Hybrid | |

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Speed Estimate for Charge-Redistribution Converters | |

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Error Correction in Successive-Approximation Converters | |

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Multi-Bit Successive-Approximation | |

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Algorithmic (or Cyclic) A/D Converter | |

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Ratio-Independent Algorithmic Converter | |

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Pipelined A/D Converters | |

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One-Bit-Per-Stage Pipelined Converter | |

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1.5 Bit Per Stage Pipelined Converter | |

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Pipelined Converter Circuits | |

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Generalized k-Bit-Per-Stage Pipelined Converters | |

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Flash Converters | |

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Issues in Designing Flash A/D Converters | |

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Two-Step A/D Converters | |

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Two-Step Converter with Digital Error Correction | |

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Interpolating A/D Converters | |

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Folding A/D Converters | |

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Time-Interleaved A/D Converters | |

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Key Points | |

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References | |

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Problems | |

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Oversampling Converters | |

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Oversampling without Noise Shaping | |

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Quantization Noise Modelling | |

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White Noise Assumption | |

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Oversampling Advantage | |

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The Advantage of 1-Bit D/A Converters | |

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Oversampling with Noise Shaping | |

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Noise-Shaped Delta-Sigma Modulator | |

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First-Order Noise Shaping | |

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Switched-Capacitor Realization of a First-Order A/D Converter | |

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Second-Order Noise Shaping | |

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Noise Transfer-Function Curves | |

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Quantization Noise Power of 1-Bit Modulators | |

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Error-Feedback Structure | |

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System Architectures | |

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System Architecture of Delta-Sigma A/D Converters | |

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System Architecture of Delta-Sigma D/A Converters | |

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Digital Decimation Filters | |

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Multi-Stage | |

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Single Stage | |

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Higher-Order Modulators | |

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Interpolative Architecture | |

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Multi-Stage Noise Shaping (MASH) Architecture | |

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Bandpass Oversampling Converters | |

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Practical Considerations | |

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Stability | |

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Linearity of Two-Level Converters | |

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Idle Tones | |

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Dithering | |

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Opamp Gain | |

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Multi-Bit Oversampling Converters | |

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Dynamic Element Matching | |

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Dynamically Matched Current Source D/S Converters | |

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Digital Calibration A/D Converter | |

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A/D with Both Multi-Bit and Single-Bit Feedback | |

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Third-Order A/D Design Example | |

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Key Points | |

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References | |

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Problems | |

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Phase-Locked Loops | |

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Basic Phase-Locked Loop Architecture | |

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Voltage Controlled Oscillator | |

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Divider | |

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Phase Detector | |

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Loop Filer | |

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The PLL in Lock | |

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Linearized Small-Signal Analysis | |

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Second-Order PLL Model | |

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Limitations of the Second-Order Small-Signal Model | |

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PLL Design Example | |

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Jitter and Phase Noise | |

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Period Jitter | |

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P-Cycle Jitter | |

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Adjacent Period Jitter | |

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Other Spectral Representations of Jitter | |

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Probability Density Function of Jitter | |

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Electronic Oscillators | |

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Ring Oscillators | |

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LC Oscillators | |

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Phase Noise of Oscillators | |

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Jitter and Phase Noise in PLLS | |

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Input Phase Noise and Divider Phase Noise | |

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VCO Phase Noise | |

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Loop Filter Noise | |

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Key Points | |

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References | |

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Problems | |

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Index | |