Analog Integrated Circuit Design

ISBN-10: 0470770104

ISBN-13: 9780470770108

Edition: 2nd 2012

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The 2nd Edition of Analog Integrated Circuit Design focuses on more coverage about several types of circuits that have increased in importance in the past decade. Furthermore, the text is enhanced with material on CMOS IC device modeling, updated processing layout and expanded coverage to reflect technical innovations. CMOS devices and circuits have more influence in this edition as well as a reduced amount of text on BiCMOS and bipolar information. New chapters include topics on frequency response of analog ICs and basic theory of feedback amplifiers.
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Book details

List price: $114.00
Edition: 2nd
Copyright year: 2012
Publisher: John Wiley & Sons, Limited
Publication date: 10/11/2011
Binding: Hardcover
Pages: 816
Size: 7.50" wide x 9.25" long x 1.25" tall
Weight: 3.124
Language: English

Integrated-Circuit Devices And Modelling
Semiconductors and pn Junctions
Reverse-Biased Diodes
Graded Junctions
Large-Signal Junction Capacitance
Forward-Biased Junctions
Junction Capacitance of Forward-Biased Diode
Small-Signal Model of a Forward-Biased Diode
Schottky Diodes
MOS Transistors
Symbols for MOS Transistors
Basic Operation
Large-Signal Modelling
Body Effect
p-Channel Transistors
Low-Frequency Small-Signal Modelling in the Active Region
High-Frequency Small-Signal Modelling in the Active Region
Small-Signal Modelling in the Triode and Cutoff Regions
Analog Figures of Merit and Trade-offs
Device Model Summary
Diode Equations
MOS Transistor Equations
Advanced MOS Modelling
Subthreshold Operation
Mobility Degradation
Summary of Subthreshold and Mobility Degradation Equations
Parasitic Resistances
Short-Channel Effects
Leakage Currents
SPICE Modelling Parameters
Diode Model
MOS Transistors
Advanced SPICE Models of MOS Transistors
Passive Devices
Diode Exponential Relationship
Diode-Diffusion Capacitance
MOS Threshold Voltage and the Body Effect
MOS Triode Relationship
Key Points
Processing And Layout
CMOS Processing
The Silicon Wafer
Photolithography and Well Definition
Diffusion and Ion Implantation
Chemical Vapor Deposition and Defining the Active Regions
Transistor Isolation
Gate-Oxide and Threshold-Voltage Adjustments
Polysilicon Gate Formation
Implanting the Junctions, Depositing SiO2, and Opening Contact Holes
Annealing, Depositing and Patterning Metal, and Overglass Deposition
Additional Processing Steps
CMOS Layout and Design Rules
Spacing Rules
Planarity and Fill Requirements
Antenna Rules
Variability and Mismatch
Systematic Variations Including Proximity Effects
Process Variations
Random Variations and Mismatch
Analog Layout Considerations
Transistor Layouts
Capacitor Matching
Resistor Layout
Noise Considerations
Key Points
Basic Current Mirrors And Single-Stage Amplifiers
Simple CMOS Current Mirror
Common-Source Amplifier
Source-Follower or Common-Drain Amplifier
Common-Gate Amplifier
Source-Degenerated Current Mirrors
Cascode Current Mirrors
Cascode Gain Stage
MOS Differential Pair and Gain Stage
Key Points
Frequency Response Of Electronic Circuits
Frequency Response of Linear Systems
Magnitude and Phase Response
First-Order Circuits
Second-Order Low-Pass Transfer Functions with Real Poles
Bode Plots
Second-Order Low-Pass Transfer Functions with Complex Poles
Frequency Response of Elementary Transistor Circuits
High-Frequency MOS Small-Signal Model
Common-Source Amplifier
Miller Theorem and Miller Effect
Zero-Value Time-Constant Analysis
Common-Source Design Examples
Common-Gate Amplifier
Cascode Gain Stage
Source-Follower Amplifier
Differential Pair
High-Frequency T-Model
Symmetric Differential Amplifier
Single-Ended Differential Amplifier
Differential Pair with Active Load
Key Points
Feedback Amplifiers
Ideal Model of Negative Feedback
Basic Definitions
Gain Sensitivity
Dynamic Response of Feedback Amplifiers
Stability Criteria
Phase Margin
First- and Second-Order Feedback Systems
First-Order Feedback Systems
Second-Order Feedback Systems
Higher-Order Feedback Systems
Common Feedback Amplifiers
Obtaining the Loop Gain, L(s)
Non-Inverting Amplifier
Transimpedance (Inverting) Amplifiers
Summary of Key Points
Basic Opamp Design And Compensation
Two-Stage CMOS Opamp
Opamp Gain
Frequency Response
Slew Rate
n-Channel or p-Channel Input Stage
Systematic Offset Voltage
Opamp Compensation
Dominant-Pole Compensation and Lead Compensation
Compensating the Two-Stage Opamp
Making Compensation Independent of Process and Temperature
Advanced Current Mirrors
Wide-Swing Current Mirrors
Enhanced Output-Impedance Current Mirrors and Gain Boosting
Wide-Swing Current Mirror with Enhanced Output Impedance
Current-Mirror Symbol
Folded-Cascode Opamp
Small-Signal Analysis
Slew Rate
Current Mirror Opamp
Linear Settling Time Revisited
Fully Differential Opamps
Fully Differential Folded-Cascode Opamp
Alternative Fully Differential Opamps
Low Supply Voltage Opamps
Common-Mode Feedback Circuits
Summary of Key Points
Biasing, References, And Regulators
Analog Integrated Circuit Biasing
Bias Circuits
Reference Circuits
Regulator Circuits
Establishing Constant Transconductance
Basic Constant-Transconductance Circuit
Improved Constant-Transconductance Circuits
Establishing Constant Voltages and Currents
Bandgap Voltage Reference Basics
Circuits for Bandgap References
Low-Voltage Bandgap Reference
Current Reference
Voltage Regulation
Regulator Specifications
Feedback Analysis
Low Dropout Regulators
Summary of Key Points
Bipolar Devices And Circuits
Bipolar-Junction Transistors
Basic Operation
Analog Figures of Merit
Bipolar Device Model Summary
SPICE Modeling
Bipolar and BICMOS Processing
Bipolar Processing
Modern SiGe BiCMOS HBT Processing
Mismatch in Bipolar Devices
Bipolar Current Mirrors and Gain Stages
Current Mirrors
Emitter Follower
Bipolar Differential Pair
Bipolar Transistor Exponential Relationship
Base Charge Storage of an Active BJT
Summary of Key Points
Noise And Linearity Analysis And Modelling
Time-Domain Analysis
Root Mean Square (rms) Value
Units of dBm
Noise Summation
Frequency-Domain Analysis
Noise Spectral Density
White Noise
1/f, or Flicker, Noise
Filtered Noise
Noise Bandwidth
Piecewise Integration of Noise
1/f Noise Tangent Principle
Noise Models for Circuit Elements
Bipolar Transistors
Capacitors and Inductors
Sampled Signal Noise
Input-Referred Noise
Noise Analysis Examples
Opamp Example
Bipolar Common-Emitter Example
CMOS Differential Pair Example
Fiber-Optic Transimpedance Amplifier Example
Dynamic Range Performance
Total Harmonic Distortion (THD)
Third-Order Intercept Point (IP3)
Spurious-Free Dynamic Range (SFDR)
Signal-to-Noise and Distortion Ratio (SNDR)
Key Points
Comparator Specifications
Input Offset and Noise
Using an Opamp for a Comparator
Input-Offset Voltage Errors
Charge-Injection Errors
Making Charge-Injection Signal Independent
Minimizing Errors Due to Charge-Injection
Speed of Multi-Stage Comparators
Latched Comparators
Latch-Mode Time Constant
Latch Offset
Examples of CMOS and BiCMOS Comparators
Input-Transistor Charge Trapping
Examples of Bipolar Comparators
Key Points
Sample-And-Hold And Translinear Circuits
Performance of Sample-and-Hold Circuits
Testing Sample and Holds
MOS Sample-and-Hold Basics
Examples of CMOS S/H Circuits
Bipolar and BiCMOS Sample-and-Holds
Translinear Gain Cell
Translinear Multiplier
Key Points
Continuous-Time Filters
Introduction to Continuous-Time Filters
First-Order Filters
Second-Order Filters
Introduction to Gm-C Filters
Integrators and Summers
Fully Differential Integrators
First-Order Filter
Biquad Filter
Transconductors Using Fixed Resistors
CMOS Transconductors Using Triode Transistors
Transconductors Using a Fixed-Bias Triode Transistor
Transconductors Using Varying Bias-Triode Transistors
Transconductors Using Constant Drain-Source Voltages
CMOS Transconductors Using Active Transistors
Constant Sum of Gate-Source Voltages
Source-Connected Differential Pair
Differential-Pair with Floating Voltage Sources
Bias-Offset Cross-Coupled Differential Pairs
Bipolar Transconductors
Gain-Cell Transconductors
Transconductors Using Multiple Differential Pairs
BiCMOS Transconductors
Tunable MOS in Triode
Fixed-Resistor Transconductor with a Translinear Multiplier
Fixed Active MOS Transconductor with a Translinear Multiplier
Active RC and MOSFET-C Filters
Active RC Filters
MOSFET-C Two-Transistor Integrators
Four-Transistor Integrators
R-MOSFET-C Filters
Tuning Circuitry
Tuning Overview
Constant Transconductance
Frequency Tuning
Q-Factor Tuning
Tuning Methods Based on Adaptive Filtering
Introduction to Complex Filters
Complex Signal Processing
Complex Operations
Complex Filters
Frequency-Translated Analog Filters
Key Points
Discrete-Time Signals
Overview of Some Signal Spectra
Laplace Transforms of Discrete-Time Signals
Spectra of Discrete-Time Signals
Downsampling and Upsampling
Discrete-Time Filters
Frequency Response of Discrete-Time Filters
Stability of Discrete-Time Filters
IIR and FIR Filters
Bilinear Transform
Sample-and-Hold Response
Key Points
Switched-Capacitor Circuits
Basic Building Blocks
Nonoverlapping Clocks
Basic Operation and Analysis
Resistor Equivalence of a Switched Capacitor
Parasitic-Sensitive Integrator
Parasitic-Insensitive Integrators
Signal-Flow-Graph Analysis
Noise in Switched-Capacitor Circuits
First-Order Filters
Switch Sharing
Fully Differential Filters
Biquad Filters
Low-Q Biquad Filter
High-Q Biquad Filter
Charge Injection
Switched-Capacitor Gain Circuits
Parallel Resistor-Capacitor Circuit
Resettable Gain Circuit
Capacitive-Reset Gain Circuit
Correlated Double-Sampling Techniques
Other Switched-Capacitor Circuits
Amplitude Modulator
Full-Wave Rectifier
Peak Detectors
Voltage-Controlled Oscillator
Sinusoidal Oscillator
Key Points
Data Converter Fundamentals
Ideal D/A Converter
Ideal A/D Converter
Quantization Noise
Deterministic Approach
Stochastic Approach
Signed Codes
Performance Limitations
Offset and Gain Error
Accuracy and Linearity
Key Points
Nyquist-Rate D/A Converters
Decoder-Based Converters
Resistor String Converters
Folded Resistor-String Converters
Multiple Resistor-String Converters
Signed Outputs
Binary-Scaled Converters
Binary-Weighted Resistor Converters
Reduced-Resistance-Ratio Ladders
R-2R-Based Converters
Charge-Redistribution Switched-Capacitor Converters
Current-Mode Converters
Thermometer-Code Converters
Thermometer-Code Current-Mode D/A Converters
Single-Supply Positive-Output Converters
Dynamically Matched Current Sources
Hybrid Converters
Resistor-Capacitor Hybrid Converters
Segmented Converters
Key Points
Nyquist-Rate A/D Converters
Integrating Converters
Successive-Approximation Converters
DAC-Based Successive Approximation
Charge-Redistribution A/D
Resistor-Capacitor Hybrid
Speed Estimate for Charge-Redistribution Converters
Error Correction in Successive-Approximation Converters
Multi-Bit Successive-Approximation
Algorithmic (or Cyclic) A/D Converter
Ratio-Independent Algorithmic Converter
Pipelined A/D Converters
One-Bit-Per-Stage Pipelined Converter
1.5 Bit Per Stage Pipelined Converter
Pipelined Converter Circuits
Generalized k-Bit-Per-Stage Pipelined Converters
Flash Converters
Issues in Designing Flash A/D Converters
Two-Step A/D Converters
Two-Step Converter with Digital Error Correction
Interpolating A/D Converters
Folding A/D Converters
Time-Interleaved A/D Converters
Key Points
Oversampling Converters
Oversampling without Noise Shaping
Quantization Noise Modelling
White Noise Assumption
Oversampling Advantage
The Advantage of 1-Bit D/A Converters
Oversampling with Noise Shaping
Noise-Shaped Delta-Sigma Modulator
First-Order Noise Shaping
Switched-Capacitor Realization of a First-Order A/D Converter
Second-Order Noise Shaping
Noise Transfer-Function Curves
Quantization Noise Power of 1-Bit Modulators
Error-Feedback Structure
System Architectures
System Architecture of Delta-Sigma A/D Converters
System Architecture of Delta-Sigma D/A Converters
Digital Decimation Filters
Single Stage
Higher-Order Modulators
Interpolative Architecture
Multi-Stage Noise Shaping (MASH) Architecture
Bandpass Oversampling Converters
Practical Considerations
Linearity of Two-Level Converters
Idle Tones
Opamp Gain
Multi-Bit Oversampling Converters
Dynamic Element Matching
Dynamically Matched Current Source D/S Converters
Digital Calibration A/D Converter
A/D with Both Multi-Bit and Single-Bit Feedback
Third-Order A/D Design Example
Key Points
Phase-Locked Loops
Basic Phase-Locked Loop Architecture
Voltage Controlled Oscillator
Phase Detector
Loop Filer
The PLL in Lock
Linearized Small-Signal Analysis
Second-Order PLL Model
Limitations of the Second-Order Small-Signal Model
PLL Design Example
Jitter and Phase Noise
Period Jitter
P-Cycle Jitter
Adjacent Period Jitter
Other Spectral Representations of Jitter
Probability Density Function of Jitter
Electronic Oscillators
Ring Oscillators
LC Oscillators
Phase Noise of Oscillators
Jitter and Phase Noise in PLLS
Input Phase Noise and Divider Phase Noise
VCO Phase Noise
Loop Filter Noise
Key Points
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