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Preface | |
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Acknowledgments | |
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Basic Digital Circuits | |
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Gate-level combinational circuit | |
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Introduction | |
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General description | |
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Basic lexical rules | |
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Library and package | |
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Entity declaration | |
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Data type and operators | |
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Architecture body | |
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Code of a 2-bit comparator | |
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Structural description | |
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Testbench | |
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Bibliographic notes | |
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Suggested experiments | |
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Code for gate-level greater-than circuit | |
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Code for gate-level binary decoder | |
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Overview of FPGA and EDA software | |
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Introduction | |
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FPGA | |
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Overview of general FPGA device | |
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Overview of Xilinx Spartan-3 device | |
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Overview of Digilent S3 board | |
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Design flow | |
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Overview of Xilinx ISE project navigator | |
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Short tutorial of ISE project navigator | |
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Create the design project and HDL codes | |
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Create a testbench and perform RTL simulation | |
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Add a constraint file and synthesize and implement the code | |
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Generate and download the configuration file to FPGA devices | |
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Short tutorial of ModelSim HDL simulator | |
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Bibliographic notes | |
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Suggested experiments | |
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Gate-level greater-than circuit | |
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Gate-level binary decoder | |
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RT-level combinational circuit | |
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Introduction | |
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RT-level components | |
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Relational operators | |
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Arithmetic operators | |
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Other synthesis related VHDL constructs | |
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Summary | |
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Routing circuit with concurrent assignment statements | |
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Conditional signal assignment statement | |
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Selected signal assignment statement | |
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Modeling with process | |
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Process | |
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Sequential signal assignment statement | |
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Routing circuit with if and case statements | |
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If statement | |
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Case statement | |
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Comparison to concurrent statements | |
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Unintended memory | |
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Constant and generic | |
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Constant | |
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Generic | |
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Design examples | |
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Hexadecimal digit to seven-segment LED decoder | |
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Sign-magnitude adder | |
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Barrel shifter | |
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A simplified floating-point adder | |
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Bibliographic notes | |
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Suggested experiments | |
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Multi-function barrel shifter | |
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Dual priority encoder | |
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BCD incrementor | |
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Floating-point greater-than circuit | |
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Floating-point and signed integer conversion circuit | |
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Enhanced floating-point adder | |
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Regular Sequential Circuit | |
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Overview | |
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D FF and register | |
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Synchronous system | |
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Code development | |
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HDL code of FF and register | |
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D FF | |
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Register | |
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Register File | |
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Storage components in Spartan-3 deviceXilinx specific | |
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Simple design examples | |
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Shift register | |
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Binary counter and variant | |
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Testbench for sequential circuits | |
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Case study | |
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LED time multiplexing circuit | |
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Stopwatch | |
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FIFO buffer | |
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Bibliographic notes | |
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Suggested experiments | |
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Programmable square wave generator | |
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PWM and LED dimmer | |
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Rotating square circuit | |
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Heartbeat circuit | |
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Rotating LED banner circuit | |
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Enhanced stopwatch | |
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Stack | |
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FSM | |
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Overview | |
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Mealy and Moore outputs | |
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FSM representation | |
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FSM code development | |
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Design examples | |
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Rising edge detector | |
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Debouncing circuit | |
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Testing circuit | |
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Bibliographic notes | |
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Suggested experiments | |
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Dual-edge detector | |
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Altern | |