Protocol Specification, Testing and Verification XV

Name: Protocol Specification, Testing and Verification XV
Price: 80.24 USD
Availability: InStock
ISBN: 9780412716201

ISBN-10: 0412716208

ISBN-13: 9780412716201

Edition: 1996

Authors: P. Dembinski, M. Sredniawa

List price: $191.95

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Description:

This volume presents the latest research worldwide on communications protocols, emphasizing specification and compliance testing. It presents the complete proceedings of the fifteenth meeting on 'Protocol Specification, Testing and Verification' arranged by the International Federation for Information Processing.

Book details

List price: $191.95
Copyright year: 1996
Publisher: Chapman & Hall
Binding: Paperback
Pages: 472
Size: 6.30" wide x 9.06" long
Weight: 0.044
Language: English



Preface


Committee Members and Invited Speakers


List of Referees



Simple on-the-fly automatic verification of linear temporal logic




Specifying real-time requirements for SDL specifications - a temporal logic-based approach




A temporal reachability analysis




True versus artificial concurrency




On compositionality and Petri nets in protocol engineering




Composition of LOTOS specifications




Principles for validation of abstract test suites specified in concurrent TTCN




An approach to testing distributed software systems




Modeling basic LOTOS by FSMs for conformance testing




The specification and verification of an experimental ATM signalling protocol




Re-usable verification elements for high-speed transfer protocol configurations




An algebraic-temporal specification of a CSMA/CD-protocol




Validation, verification and implementation of timed protocols using AORTA




Validation in context




Characterizing termination in LOTOS via testing




Quantified reduced views of state graphs using Markovian and timed observational equivalence




SDL and Petri net performance analysis of communicating systems




On the introduction of gate typing in E-LOTOS




An analysis of bitstate hashing




Using asynchronous Buchi automata for efficient automatic verification of concurrent systems




A method to build symbolic representations of LOTOS specifications




Formal design of cooperative systems




On the suitability of Estelle for multimedia systems




Protocol analysis and verification methods, application to the Xpress Transfer Protocol 4.0




PARES - a portable parallel Estelle compiler




A methodology for the implementation of protocols in hardware from a formal description




Hardware specification generated from Estelle



Index of contributors


Keyword index