Computer Organization and Architecture Designing for Performance

ISBN-10: 0136073735
ISBN-13: 9780136073734
Edition: 8th 2010
List price: $163.80 Buy it from $6.86
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Description: Learn the fundamentals of processor and computer design from the newest edition of this award winning text. Four-time winner of the best Computer Science and Engineering textbook of the year award from the Textbook and Academic Authors  More...

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Book details

List price: $163.80
Edition: 8th
Copyright year: 2010
Publisher: Prentice Hall PTR
Publication date: 4/3/2009
Binding: Hardcover
Pages: 792
Size: 7.50" wide x 9.25" long x 1.25" tall
Weight: 2.750
Language: English

Learn the fundamentals of processor and computer design from the newest edition of this award winning text. Four-time winner of the best Computer Science and Engineering textbook of the year award from the Textbook and Academic Authors Association,Computer Organization and Architecture: Designing for Performanceprovides a thorough discussion of the fundamentals of computer organization and architecture, covering not just processor design, but memory, I/O, and parallel systems.Coverage is supported by a wealth of concrete examples emphasizing modern RISC, CISC, and superscalar systems. The eighth revision has been updated to reflect major advances in computer technology, including multicore processors and embedded processors. Interactive simulations have been expanded and keyed into relevant sections of text. MARKET: This unique text on computer architecture and design offers unparalleled tools for professors and students, through online interactive simulations and extensive self-assessment tools.

Web Site for the Book
About the Author
Preface
Reader's Guide
Outline of the Book
A Roadmap for Readers and Instructors
Why Study Computer Organization and Architecture
Internet and Web Resources
Overview
Introduction
Organization and Architecture
Structure and Function
Key Terms and Review Questions
Computer Evolution and Performance
A Brief History of Computers
Designing for Performance
The Evolution of the Intel x86 Architecture
Embedded Systems and the ARM
Performance Assessment
Recommended Reading and Web Sites
Key Terms, Review Questions, and Problems
The Computer System
A Top-Level View of Computer Function and Interconnection
Computer Components
Computer Function
Interconnection Structures
Bus Interconnection
PCI
Recommended Reading and Web Sites
Key Terms, Review Questions, and Problems
Appendix 3A Timing Diagrams
Cache Memory
Computer Memory System Overview
Cache Memory Principles
Elements of Cache Design
Pentium 4 Cache Organization
ARM Cache Organization
Recommended Reading
Key Terms, Review Questions, and Problems
Appendix 4A Performance Characteristics of Two-Level Memories
Internal Memory Technology
Semiconductor Main Memory
Error Correction
Advanced DRAM Organization
Recommended Reading and Web Sites
Key Terms, Review Questions, and Problems
External Memory
Magnetic Disk
RAID
Optical Memory
Magnetic Tape
Recommended Reading and Web Sites
Key Terms, Review Questions, and Problems
Input/Output
External Devices
I/O Modules
Programmed I/O
Interrupt-Driven I/O
Direct Memory Access
I/O Channels and Processors
The External Interface: Fire Wire and Infiniband
Recommended Reading and Web Sites
Key Terms, Review Questions, and Problems
Operating System Support
Operating System Overview
Scheduling
Memory Management
Pentium Memory Management
ARM Memory Management
Recommended Reading and Web Sites
Key Terms, Review Questions, and Problems
The Central Processing Unit
Computer Arithmetic
The Arithmetic and Logic Unit (ALU)
Integer Representation
Integer Arithmetic
Floating-Point Representation
Floating-Point Arithmetic
Recommended Reading and Web Sites
Key Terms, Review Questions, and Problems
Instruction Sets: Characteristics and Functions
Machine Instruction Characteristics and Functions
Types of Operands
Intel x86 and ARM Data Types
Types of Operations
Intel x86 and ARM Operation Types
Recommended Reading
Key Terms, Review Questions, and Problems
Appendix 10A Stacks
Appendix 10B Little, Big, and Bi-Endian
Instruction Sets: Addressing Modes and Formats
Addressing
x86 and ARM Addressing Modes
Instruction Formats
x86 and ARM Instruction Formats
Assembly Language
Recommended Reading
Key Terms, Review Questions, and Problems
Processor Structure and Function
Processor Organization
Register Organization
The Instruction Cycle
Instruction Pipelining
The x86 Processor Family
The ARM Processor
Recommended Reading
Key Terms, Review Questions, and Problems
Reduced Instruction Set Computers (RISCs)
Instruction Execution Characteristics
The Use of a Large Register File
Compiler-Based Register Optimization
Reduced Instruction Set Architecture
RISC Pipelining
MIPS R4000
SPARC
The RISC versus CISC Controversy
Recommended Reading
Key Terms, Review Questions, and Problems
Instruction-Level Parallelism and Superscalar Processors
Overview
Design Issues
Pentium 4
ARM Cortex-A8
Recommended Reading
Key Terms, Review Questions, and Problems
The Control Unit
Control Unit Operation
Micro-operations
Control of the Processor
Hardwired Implementation
Recommended Reading
Key Terms, Review Questions, and Problems
Microprogrammed Control
Basic Concepts
Microinstruction Sequencing
Microinstruction Execution
TI 8800
Recommended Reading
Key Terms, Review Questions, and Problems
Parallel Organization
Parallel Processing
The Use of Multiple Processors
Symmetric Multiprocessors
Cache Coherence and the MESI Protocol
Multithreading and Chip Multiprocessors
Clusters
Nonuniform Memory Access Computers
Vector Computation
Recommended Reading and Web Sites
Key Terms, Review Questions, and Problems
Multicore Computers
Hardware Performance Issues
Software Performance Issues
Multicore Organization
Intel x86 Multicore Organization
ARM11 MPCore
Recommended Reading and Web Sites
Key Terms, Review Questions, and Problems
Projects for Teaching Computer Organization and Architecture
Interactive Simulations
Research Projects
Simulation Projects
Assembly Language Projects
Reading/Report Assignments
Writing Assignments
Test Bank
Assembly Language and Related Topics
Assembly Language
Assemblers
Loading and Linking
Recommended Reading and Web Sites
Key Terms, Review Questions, and Problems
Online Chapters WilliamStalling.com/COA/COA8e.html
Number Systems 19-1
The Decimal System 19-2
The Binary System 19-2
Converting between Binary and Decimal 19-3
Hexadecimal Notation 19-5
Key Terms, Review Questions, and Problems 19-8
Digital Logic 20-1
Boolean Algebra 20-2
Gates 20-4
Combinational Circuits 20-7
Sequential Circuits 20-24
Programmable Logic Devices 20-33
Recommended Reading and Web Site 20-38
Key Terms and Problems 20-39
The IA-64 Architecture 21-1
Motivation 21-3
General Organization 21-4
Predication, Speculation, and Software Pipelining 21-6
IA-64 Instruction Set Architecture 21-23
Itanium Organization 21-28
Recommended Reading and Web Sites 21-31
Key Terms, Review Questions, and Problems 21-32
Online Appendices William Stallings.com/COA/COA8e.html
Hash Tables
Victim Cache Strategies
Victim Cache
Selective Victim Cache
Interleaved Memory
International Reference Alphabet
Virtual Memory Page Replacement Algorithms
Recursive Procedures
Recursion
Activation Tree Representation
Stack Processing
Recursion and Iteration
Additional Instruction Pipeline Topics
Pipeline Reservation Tables
Reorder Buffers
Scoreboarding
Tomasulo's Algorithm
Linear Tape Open Technology
DDR SDRAM
Glossary
References
Index

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