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| Web Site for the Book | |
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| About the Author | |
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| Preface | |
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| Reader's Guide | |
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| Outline of the Book | |
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| A Roadmap for Readers and Instructors | |
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| Why Study Computer Organization and Architecture | |
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| Internet and Web Resources | |
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| Overview | |
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| Introduction | |
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| Organization and Architecture | |
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| Structure and Function | |
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| Key Terms and Review Questions | |
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| Computer Evolution and Performance | |
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| A Brief History of Computers | |
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| Designing for Performance | |
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| The Evolution of the Intel x86 Architecture | |
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| Embedded Systems and the ARM | |
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| Performance Assessment | |
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| Recommended Reading and Web Sites | |
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| Key Terms, Review Questions, and Problems | |
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| The Computer System | |
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| A Top-Level View of Computer Function and Interconnection | |
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| Computer Components | |
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| Computer Function | |
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| Interconnection Structures | |
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| Bus Interconnection | |
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| PCI | |
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| Recommended Reading and Web Sites | |
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| Key Terms, Review Questions, and Problems | |
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| Appendix 3A Timing Diagrams | |
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| Cache Memory | |
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| Computer Memory System Overview | |
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| Cache Memory Principles | |
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| Elements of Cache Design | |
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| Pentium 4 Cache Organization | |
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| ARM Cache Organization | |
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| Recommended Reading | |
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| Key Terms, Review Questions, and Problems | |
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| Appendix 4A Performance Characteristics of Two-Level Memories | |
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| Internal Memory Technology | |
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| Semiconductor Main Memory | |
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| Error Correction | |
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| Advanced DRAM Organization | |
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| Recommended Reading and Web Sites | |
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| Key Terms, Review Questions, and Problems | |
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| External Memory | |
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| Magnetic Disk | |
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| RAID | |
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| Optical Memory | |
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| Magnetic Tape | |
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| Recommended Reading and Web Sites | |
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| Key Terms, Review Questions, and Problems | |
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| Input/Output | |
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| External Devices | |
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| I/O Modules | |
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| Programmed I/O | |
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| Interrupt-Driven I/O | |
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| Direct Memory Access | |
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| I/O Channels and Processors | |
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| The External Interface: Fire Wire and Infiniband | |
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| Recommended Reading and Web Sites | |
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| Key Terms, Review Questions, and Problems | |
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| Operating System Support | |
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| Operating System Overview | |
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| Scheduling | |
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| Memory Management | |
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| Pentium Memory Management | |
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| ARM Memory Management | |
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| Recommended Reading and Web Sites | |
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| Key Terms, Review Questions, and Problems | |
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| The Central Processing Unit | |
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| Computer Arithmetic | |
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| The Arithmetic and Logic Unit (ALU) | |
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| Integer Representation | |
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| Integer Arithmetic | |
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| Floating-Point Representation | |
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| Floating-Point Arithmetic | |
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| Recommended Reading and Web Sites | |
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| Key Terms, Review Questions, and Problems | |
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| Instruction Sets: Characteristics and Functions | |
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| Machine Instruction Characteristics and Functions | |
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| Types of Operands | |
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| Intel x86 and ARM Data Types | |
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| Types of Operations | |
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| Intel x86 and ARM Operation Types | |
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| Recommended Reading | |
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| Key Terms, Review Questions, and Problems | |
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| Appendix 10A Stacks | |
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| Appendix 10B Little, Big, and Bi-Endian | |
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| Instruction Sets: Addressing Modes and Formats | |
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| Addressing | |
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| x86 and ARM Addressing Modes | |
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| Instruction Formats | |
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| x86 and ARM Instruction Formats | |
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| Assembly Language | |
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| Recommended Reading | |
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| Key Terms, Review Questions, and Problems | |
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| Processor Structure and Function | |
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| Processor Organization | |
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| Register Organization | |
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| The Instruction Cycle | |
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| Instruction Pipelining | |
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| The x86 Processor Family | |
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| The ARM Processor | |
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| Recommended Reading | |
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| Key Terms, Review Questions, and Problems | |
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| Reduced Instruction Set Computers (RISCs) | |
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| Instruction Execution Characteristics | |
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| The Use of a Large Register File | |
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| Compiler-Based Register Optimization | |
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| Reduced Instruction Set Architecture | |
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| RISC Pipelining | |
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| MIPS R4000 | |
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| SPARC | |
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| The RISC versus CISC Controversy | |
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| Recommended Reading | |
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| Key Terms, Review Questions, and Problems | |
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| Instruction-Level Parallelism and Superscalar Processors | |
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| Overview | |
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| Design Issues | |
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| Pentium 4 | |
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| ARM Cortex-A8 | |
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| Recommended Reading | |
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| Key Terms, Review Questions, and Problems | |
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| The Control Unit | |
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| Control Unit Operation | |
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| Micro-operations | |
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| Control of the Processor | |
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| Hardwired Implementation | |
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| Recommended Reading | |
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| Key Terms, Review Questions, and Problems | |
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| Microprogrammed Control | |
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| Basic Concepts | |
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| Microinstruction Sequencing | |
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| Microinstruction Execution | |
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| TI 8800 | |
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| Recommended Reading | |
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| Key Terms, Review Questions, and Problems | |
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| Parallel Organization | |
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| Parallel Processing | |
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| The Use of Multiple Processors | |
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| Symmetric Multiprocessors | |
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| Cache Coherence and the MESI Protocol | |
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| Multithreading and Chip Multiprocessors | |
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| Clusters | |
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| Nonuniform Memory Access Computers | |
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| Vector Computation | |
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| Recommended Reading and Web Sites | |
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| Key Terms, Review Questions, and Problems | |
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| Multicore Computers | |
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| Hardware Performance Issues | |
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| Software Performance Issues | |
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| Multicore Organization | |
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| Intel x86 Multicore Organization | |
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| ARM11 MPCore | |
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| Recommended Reading and Web Sites | |
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| Key Terms, Review Questions, and Problems | |
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| Projects for Teaching Computer Organization and Architecture | |
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| Interactive Simulations | |
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| Research Projects | |
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| Simulation Projects | |
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| Assembly Language Projects | |
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| Reading/Report Assignments | |
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| Writing Assignments | |
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| Test Bank | |
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| Assembly Language and Related Topics | |
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| Assembly Language | |
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| Assemblers | |
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| Loading and Linking | |
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| Recommended Reading and Web Sites | |
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| Key Terms, Review Questions, and Problems | |
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| Online Chapters WilliamStalling.com/COA/COA8e.html | |
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| Number Systems 19-1 | |
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| The Decimal System 19-2 | |
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| The Binary System 19-2 | |
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| Converting between Binary and Decimal 19-3 | |
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| Hexadecimal Notation 19-5 | |
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| Key Terms, Review Questions, and Problems 19-8 | |
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| Digital Logic 20-1 | |
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| Boolean Algebra 20-2 | |
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| Gates 20-4 | |
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| Combinational Circuits 20-7 | |
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| Sequential Circuits 20-24 | |
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| Programmable Logic Devices 20-33 | |
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| Recommended Reading and Web Site 20-38 | |
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| Key Terms and Problems 20-39 | |
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| The IA-64 Architecture 21-1 | |
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| Motivation 21-3 | |
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| General Organization 21-4 | |
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| Predication, Speculation, and Software Pipelining 21-6 | |
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| IA-64 Instruction Set Architecture 21-23 | |
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| Itanium Organization 21-28 | |
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| Recommended Reading and Web Sites 21-31 | |
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| Key Terms, Review Questions, and Problems 21-32 | |
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| Online Appendices William Stallings.com/COA/COA8e.html | |
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| Hash Tables | |
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| Victim Cache Strategies | |
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| Victim Cache | |
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| Selective Victim Cache | |
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| Interleaved Memory | |
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| International Reference Alphabet | |
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| Virtual Memory Page Replacement Algorithms | |
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| Recursive Procedures | |
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| Recursion | |
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| Activation Tree Representation | |
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| Stack Processing | |
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| Recursion and Iteration | |
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| Additional Instruction Pipeline Topics | |
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| Pipeline Reservation Tables | |
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| Reorder Buffers | |
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| Scoreboarding | |
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| Tomasulo's Algorithm | |
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| Linear Tape Open Technology | |
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| DDR SDRAM | |
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| Glossary | |
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| References | |
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| Index | |