Introductory Concepts | |
Numerical Representations | |
Digital and Analog Systems | |
Digital Number Systems | |
Representing Binary Quantities | |
Digital Circuits/Logic Circuits | |
Parallel and Series Transmission | |
Memory | |
Digital Computers | |
Number Systems and Codes | |
Binary-to-Decimal Conversions | |
Decimal-to-Binary Conversions | |
Octal Number System | |
Hexadecimal Number System | |
BCD Code | |
Putting It All Together | |
The Byte, Nibble, and Word | |
Alphanumeric Codes | |
Parity Method for Error Detection | |
Applications | |
Describing Logic Circuits | |
Boolean Constants and Variables | |
Truth Tables | |
OR Operation with OR Gates | |
AND Operation with AND Gates | |
NOT Operation | |
Describing Logic Circuits Algebraically | |
Evaluating Logic-Circuit Outputs | |
Implementing Circuits from Boolean Expressions | |
NOR Gates and NAND Gates | |
Boolean Theorems | |
DeMorgan's Theorems | |
Universality of NAND Gates and NOR Gates | |
Alternate Logic-Gate Representations | |
Which Gate Representation to Use | |
IEEE/ANSI Standard Logic Symbols | |
Summary of Methods to Describe Logic Circuits | |
Description Languages Versus Programming Languages | |
Implementing Logic Circuits with PLDs | |
HDL Format and Syntax | |
Intermediate Signals | |
Combinational Logic Circuits | |
Sum-of-Products Form | |
Simplifying Logic Circuits | |
Algebraic Simplification | |
Designing Combinational Logic Circuits | |
Karnaugh Map Method | |
Exclusive-OR and Exclusive-NOR Circuits | |
Parity Generator and Checker | |
Enable/Disable Circuits | |
Basic Characteristics of Digital ICs | |
Troubleshooting Digital Systems | |
Internal Digital IC Faults | |
External Faults | |
Troubleshooting Case Study | |
Programmable Logic Devices | |
Representing Data in HDL | |
Truth Tables Using HDL | |
Decision Control Structures in HDL | |
Flip-Flops and Related Devices | |
NAND Gate Latch | |
NOR Gate Latch | |
Troubleshooting Case Study | |
Clock Signals and Clocked Flip-Flops | |
Clocked S-C Flip-Flop | |
Clocked J-K Flip-Flop | |
Clocked D Flip-Flop | |
D Latch (Transparent Latch) | |
Asynchronous Inputs | |
IEEE/ANSI Symbols | |
Flip-Flop Timing Considerations | |
Potential Timing Problem in FF Circuits | |
Master/Slave Flip-Flops | |
Flip-Flop Applications | |
Flip-Flop Synchronization | |
Detecting an Input Sequence | |
Data Storage and Transfer | |
Serial Data Transfer: Shift Registers | |
Frequency Division and Counting | |
Microcomputer Application | |
Schmitt-Trigger Devices | |
One-Shot (Monostable Multivibrator) | |
Analyzing Sequential Circuits | |
Clock Generator Circuits | |
Troubleshooting Flip-Flop Circuits | |
Sequential Circuits Using HDL | |
Edge-Triggered Devices | |
HDL Circuits with Multiple Components | |
Digital Arithmetic: Operations and Circuits | |
Binary Addition | |
Representing Signed Numbers | |
Addition in the 2's-Complement System | |
Subtraction in the 2's-Complement System | |
Multiplication of Binary Numbers | |
Binary Division | |
BCD Addition | |
Hexadecimal Arithmetic | |
Arithmetic Circuits | |
Parallel Binary Adder | |
Design of a Full Adder | |
Complete Parallel Adder with Registers | |
Carry Propagation | |
Integrated-Circuit Parallel Adder | |
2's-Complement System | |
BCD Adder | |
ALU Integrated Circuits | |
IEEE/ANSI Symbols | |
Troubleshooting Case Study | |
Using TTL Library Functions with HDL | |
Logical Operations on Bit Arrays | |
HDL Adders | |
Expanding the Bit Capacity of a Circuit | |
Counters and Registers | |
Part I.Asynchronous (Ripple) Counters | |
Counters with MOD Numbers <2 N | |
IC Asynchronous Counters | |
Asynchronous Down Counter | |
Propagation Delay in Ripple Counters | |
Synchronous (Parallel) Counters | |
Synchronous Down | |
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