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| Introduction to Microprocessors and Microcomputers | |
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| The IBM and IBM-Compatible Personal Computers: Reprogrammable Microcomputers | |
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| General Architecture of a Microcomputer System | |
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| Evolution of the Intel Microprocessor Architecture | |
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| Software Architecture of the 8088 and 8086 Microprocessors | |
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| Internal Architecture of the 8088/8086 Microprocessor | |
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| Software Model of the 8088/8086 Microprocessor | |
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| Memory Address Space and Data Organization | |
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| Data Types | |
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| Segment Registers and Memory Segmentation | |
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| Dedicated, Reserved, and General-Use Memory | |
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| Instruction Pointer | |
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| Data Registers | |
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| Pointer and Index Registers | |
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| Status Register | |
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| Generating a Memory Address | |
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| The Stack | |
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| Input/Output Address Space | |
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| 8088/8086 Instruction Set, Machine Codes, and Addressing Modes | |
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| The Instruction Set of the 8088/8086 | |
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| Software--The Microcomputer Program | |
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| Converting Assembly Language Instructions to Machine Code | |
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| Addressing Modes of the 8088/8086 | |
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| Encoding a Complete Program in Machine Code | |
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| The DEBUG, a Software Development Program for the PC | |
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| The PC and Its DEBUG Program | |
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| Examining and Modifying the Contents of Memory | |
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| Input and Output of Data | |
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| Hexadecimal Addition and Subtraction | |
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| Loading, Verifying, and Saving Machine Language Programs | |
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| Assembling Instructions with the Assemble Command | |
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| Executing Instructions and Programs with the Trace and Go Commands | |
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| Debugging a Program | |
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| 8088/8086 Microprocessor Programming 1 | |
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| Data Transfer Instructions | |
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| Arithmetic Instructions | |
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| Logic Instructions | |
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| Shift Instructions | |
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| Rotate Instructions | |
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| 8088/8086 Microprocessor Programming 2 | |
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| Flag-Control Instructions | |
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| Compare Instruction | |
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| Jump Instructions | |
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| Subroutines and Subroutine-Handling Instructions | |
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| Loop and the Loop-Handling Instructions | |
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| Strings and String-Handling Instructions | |
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| Assembly Language Program Development with Masm | |
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| Assembly Language Program Development | |
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| Statement Syntax for a Source Program | |
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| Assembler Directives | |
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| Creating a Source File with an Editor | |
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| Assembling and Linking Programs | |
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| Loading and Executing a Run Module | |
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| The 8088 and 8086 Microprocessors and Their Memory and Input/Output Interfaces | |
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| 8088 and 8086 Microprocessors | |
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| Minimum-Mode and Maximum-Mode Systems | |
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| Minimum-Mode Interface | |
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| Maximum-Mode Interface | |
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| Electrical Characteristics | |
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| System Clock | |
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| Bus Cycle and Time States | |
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| Hardware Organization of the Memory Address Space | |
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| Memory Bus Status Codes | |
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| Memory Control Signals | |
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| Read and Write Bus Cycles | |
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| Memory Interface Circuits | |
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| Programmable Logic Arrays | |
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| Types of Input/Output | |
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| Isolated Input/Output Interface | |
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| Input/Output Data Transfers | |
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| Input/Output Instructions | |
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| Input/Output Bus Cycles | |
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| Memory Devices, Circuits, and Subsystem Design | |
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| Program and Data Storage Memory | |
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| Read-Only Memory | |
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| Random Access Read/Write Memories | |
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| Parity, the Parity Bit, and Parity Checker/Generator Circuit | |
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| FLASH Memory | |
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| Wait-State Circuitry | |
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| 8088/8086 Microcomputer System Memory Circuitry | |
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| Input/Output Interface Circuits and Lsi Peripheral Devices | |
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| Core and Special-Purpose I/O Interfaces | |
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| Byte-Wide Output Ports Using Isolated I/O | |
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| Byte-Wide Input Ports Using Isolated I/O | |
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| Input/Output Handshaking and a Parallel Printer Interface | |
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| 82C55A Programmable Peripheral Interface (PPI) | |
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| 82C55A Implementation of Parallel Input/Output Ports | |
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| Memory-Mapped Input/Output | |
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| 82C54 Programmable Interval Timer | |
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| 82C37A Programmable Direct Memory Access Controller | |
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| Serial Communications Interface | |
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| Programmable Communication Interface Controllers | |
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| Keyboard and Display Interface | |
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| 8279 Programmable Keyboard/Display Controller | |
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| Interrupt Interface of the 8088 and 8086 Microprocessors | |
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| Interrupt Mechanism, Types, and Priority | |
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| Interrupt Vector Table | |
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| Interrupt Instructions | |
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| Enabling/Disabling of Interrupts | |
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| External Hardware-Interrupt Interface | |
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| External Hardware-Interrupt Sequence | |
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| 82C59A Programmable Interrupt Controller | |
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| Interrupt Interface Circuits Using the 82C59A | |
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| Software Interrupts | |
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| Nonmaskable Interrupt | |
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| Reset | |
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| Internal Interrupt Functions | |
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| IBM PC Microcomputer Hardware | |
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| Architecture of the IBM PC System Processor Board | |
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| System Processor Circuitry | |
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| Wait State Logic and NMI Circuitry | |
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| Input/Output and Memory Chip-Select Circuitry | |
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| Memory Circuitry | |
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| Direct Memory Access Circuitry | |
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| Timer Circuitry | |
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| Input/Output Circuitry | |
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| Input/Output Channel Interface | |
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| PC BUS Interfacing, Circuit Construction, Testing, and Troubleshooting | |
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| PC Bus-Based Interfacing | |
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| The PC[mu]LAB Laboratory Test Unit | |
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| Experimenting with the On-Board Circuitry of the PC[mu]LAB | |
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| Building, Testing, and Troubleshooting Circuits | |
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| Observing Microcomputer Bus Activity with a Digital Logic Analyzer | |
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| Real-Mode Software and Hardware Architecture of the 80286 Microprocessor | |
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| 80286 Microprocessor | |
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| Internal Architecture | |
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| Real-Mode Software Model | |
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| Real-Mode Extended Instruction Set | |
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| Interfaces of the 80286 | |
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| 82C288 Bus Controller | |
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| System Clock | |
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| Bus Cycle and Bus States | |
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| Memory Interface | |
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| Nput/Output Interface | |
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| Interrupt and Exception Processing | |
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| The 80386, 80486, and Pentium Processor Families: Software Architecture | |
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| 80386 Microprocessor Family | |
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| Internal Architecture of the 80386 | |
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| Real-Address-Mode Software Model of the 80386DX Microprocessor | |
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| Real-Address-Mode Instruction Set of the 80386 | |
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| Protected-Address-Mode Software Architecture of the 80386 | |
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| Descriptor and Page Table Entries of the 80386DX | |
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| Protected-Mode System-Control Instruction Set of the 80386 | |
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| Multitasking and Protection | |
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| Virtual 8086 Mode | |
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| 80486 Microprocessor Family | |
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| The Pentium Processor Family | |
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| The 80386, 80486, and Pentium Processor Families: Hardware Architecture | |
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| 80386 Microprocessor Family | |
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| Signal Interfaces of the 80386DX | |
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| System Clock of the 80386DX | |
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| 80386DX Bus States and Pipelined and Nonpipelined Bus Cycles | |
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| Memory Interface | |
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| Input/Output Interface | |
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| Interrupt and Exception Processing | |
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| 80486 and 80486DX Microprocessors | |
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| Other 80486 Family Microprocessors--80486DX2 and 80486DX4 | |
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| Pentium Processor Family | |
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| Pentium Pro Processor and Pentium Processor with MMX Technology | |
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| Pentium II Processor, Celeron Processor, and Pentium II Xeon Processor | |
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| Answers to Selected Review Problems | |
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| Bibliography | |
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| Index | |