Digital Computer Electronics

ISBN-10: 0028005945
ISBN-13: 9780028005942
Edition: 3rd 1993 (Revised)
List price: $156.67
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Book details

List price: $156.67
Edition: 3rd
Copyright year: 1993
Publisher: McGraw-Hill Higher Education
Binding: Hardcover
Pages: 544
Size: 8.75" wide x 11.50" long x 1.25" tall
Weight: 3.300
Language: English

Preface
Digital Principles
Number Systems and Codes
Decimal Odometer
Binary Odometer
Number Codes
Why Binary Numbers Are Used
Binary-to-Decimal Conversion
Microprocessors
Decimal-to-Binary Conversion
Hexadecimal Numbers
Hexadecimal-Binary Conversions
Hexadecimal-to-Decimal Conversion
Decimal-to-Hexadecimal Conversion
BCD Numbers
The ASCII Code
Gates
Inverters
Or Gates
And Gates
Boolean Algebra
More Logic Gates
Nor Gates
De Morgan's First Theorem
Nand Gates
De Morgan's Second Theorem
Exclusive-Or Gates
The Controlled Inverter
Exclusive-Nor Gates
TTL Circuits
Digital Integrated Circuits
7400 Devices
TTL Characteristics
TTL Overview
And-Or-Invert Gates
Open-Collector Gates
Multiplexers
Boolean Algebra and Karnaugh Maps
Boolean Relations
Sum-of-Products Method
Algebraic Simplification
Karnaugh Maps
Pairs, Quads, and Octets
Karnaugh Simplifications
Don't-Care Conditions
Arithmetic-Logic Units
Binary Addition
Binary Subtraction
Half Adders
Full Adders
Binary Adders
Signed Binary Numbers
2's Complement
2's-Complement Adder-Subtracter
Flip-Flops
RS Latches
Level Clocking
D Latches
Edge-Triggered D Flip-Flops
Edge-Triggered JK Flip-Flops
JK Master-Slave Flip-Flop
Registers and Counters
Buffer Registers
Shift Registers
Controlled Shift Registers
Ripple Counters
Synchronous Counters
Ring Counters
Other Counters
Three-State Registers
Bus-Organized Computers
Memories
ROMs
PROMs and EPROMs
RAMs
A Small TTL Memory
Hexadecimal Addresses
SAP (Simple-as-Possible) Computers
SAP-1
Architecture
Instruction Set
Programming SAP-1
Fetch Cycle
Execution Cycle
The SAP-1 Microprogram
The SAP-1 Schematic Diagram
Microprogramming
SAP-2
Bidirectional Registers
Architecture
Memory-Reference Instructions
Register Instructions
Jump and Call Instructions
Logic Instructions
Other Instructions
SAP-2 Summary
SAP-3
Programming Model
MOV and MVI
Arithmetic Instructions
Increments, Decrements, and Rotates
Logic Instructions
Arithmetic and Logic Immediates
Jump Instructions
Extended-Register Instructions
Indirect Instructions
Stack Instructions
Programming Popular Microprocessors
Introduction to Microprocessors
Computer Hardware
Definition of a Microprocessor
Some Common Uses for Microprocessors
Microprocessors Featured in This Text
Access to Microprocessors
Programming and Languages
Relationship between Electronics and Programming
Programming
Fundamental Premise
Flowcharts
Programming Languages
Assembly Language
Worksheets
System Overview
New Concepts
Computer Architecture
Microprocessor Architecture
Specific Microprocessor Families
6502 Family
6800/6808 Family
8080/8085/Z80 Family
8086/8088 Family
Data Transfer Instructions
New Concepts
CPU Control Instructions
Data Transfer Instructions
Specific Microprocessor Families
6502 Family
6800/6808 Family
8080/8085/Z80 Family
8086/8088 Family
Addressing Modes--I
New Concepts
What Is an Addressing Mode?
The Paging Concept
Basic Addressing Modes
Specific Microprocessor Families
6502 Family
6800/6808 Family
8080/8085/Z80 Family
8086/8088 Family
Arithmetic and Flags
New Concepts
Microprocessors and Numbers
Arithmetic Instructions
Flag Instructions
Specific Microprocessor Families
6502 Family
6800/6808 Family
8080/8085/Z80 Family
8086/8088 Family
Logical Instructions
New Concepts
The and Instruction
The or Instruction
The Exclusive-or (EOR, XOR) Instruction
The not Instruction
The NEG (NEGate) Instruction
Specific Microprocessor Families
6502 Family
6800/6808 Family
8080/8085/Z80 Family
8086/8088 Family
Shift and Rotate Instructions
New Concepts
Rotating
Shifting
An Example
Specific Microprocessor Families
6502 Family
6800/6808 Family
8080/8085/Z80 Family
8086/8088 Family
Addressing Modes--II
New Concepts
Advanced Addressing Modes
Specific Microprocessor Families
6502 Family
6800/6808 Family
8080/8085/Z80 Family
8086/8088 Family
Branching and Loops
New Concepts
Unconditional Jumps
Conditional Branching
Compare and Test Instructions
Increment and Decrement Instructions
Nested Loops
Specific Microprocessor Families
6502 Family
6800/6808 Family
8080/8085/Z80 Family
8086/8088 Family
Subroutine and Stack Instructions
New Concepts
Stack and Stack Pointer
Branching versus Subroutines
How Do Subroutines Return?
Pushing and Popping Registers
Specific Microprocessor Families
6502 Family
6800/6808 Family
8080/8085/Z80 Family
8086/8088 Family
Microprocessor Instruction Set Tables
Expanded Table of 8085/8080 and Z80 (8080 Subset) Instructions Listed by Category
Mini Table of 8085/8080 and Z80 (8080 Subset) Instructions Listed by Category
Condensed Table of 8085/8080 and Z80 (8080) Instructions Listed by Category
Condensed Table of 8085/8080 and Z80 (8080 Subset) Instructions Listed by Op Code
Condensed Table of 8085/8080 and Z80 (8080 Subset) Instructions Listed Alphabetically by 8085/8080 Mnemonic
Condensed Table of 8085/8080 and Z80 (8080 Subset) Instructions Listed Alphabetically by Z80 Mnemonic
Expanded Table of 6800 Instructions Listed by Category
Short Table of 6800 Instructions Listed Alphabetically
Short Table of 6800 Instructions Listed by Category
Condensed Table of 6800 Instructions Listed by Category
Condensed Table of 6800 Instructions Listed Alphabetically
Condensed Table of 6800 Instructions Listed by Op Code
Expanded Table of 8086/8088 Instructions Listed by Category
Condensed Table of 8086/8088 Instructions Listed by Category
Condensed Table of 8086/8088 Instructions Listed Alphabetically
Expanded Table of 6502 Instructions Listed by Category
Short Table of 6502 Instructions Listed by Category
Condensed Table of 6502 Instructions Listed by Category
Condensed Table of 6502 Instructions Listed Alphabetically
Condensed Table of 6502 Instructions Listed by Op Code
Appendixes
The Analog Interface
Binary-Hexadecimal-Decimal Equivalents
7400 Series TTL
Pinouts and Function Tables
SAP-1 Parts List
8085 Instructions
Memory Locations: Powers of 2
Memory Locations: 16K and 8K Intervals
Memory Locations: 4K Intervals
Memory Locations: 2K Intervals
Memory Locations: 1K Intervals
Programming Models
Answers to Odd-Numbered Problems
Index

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